Patents by Inventor Giovanni Galli

Giovanni Galli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8154324
    Abstract: A driver integrated circuit for driving at least one high voltage half bridge stage. The driver including a filter circuit for filtering a signal provided to the half bridge stage, a minimum pulse width of the signal being near a constant time of the filter, wherein the filter circuit prevents distortions introduced when the signal is at its minimum pulse width from being passed to the half bridge stage.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: April 10, 2012
    Assignee: International Rectifier Corporation
    Inventors: Christian Locatelli, Giovanni Galli
  • Patent number: 7914205
    Abstract: A temperature sensor circuit in accordance with an embodiment of the present invention includes a temperature sensing element operable to provide a temperature voltage that is linearly related to the absolute temperature of the circuit. The temperature sensing element includes a first bi-polar junction transistor and a second bipolar junction transistor connected between a supply voltage and a common ground, wherein the base of first bipolar junction transistor is connected to the base of the second bipolar junction transistor, a first resistor connected between an emitter of the first bipolar junction transistor and the common ground and a second resistor connected between the common ground and a first node, wherein the temperature voltage is provided to the first node across the second resistor.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: March 29, 2011
    Assignee: International Rectifier Corporation
    Inventor: Giovanni Galli
  • Publication number: 20090207883
    Abstract: A temperature sensor circuit in accordance with an embodiment of the present invention includes a temperature sensing element operable to provide a temperature voltage that is linearly related to the absolute temperature of the circuit. The temperature sensing element includes a first bi-polar junction transistor and a second bipolar junction transistor connected between a supply voltage and a common ground, wherein the base of first bipolar junction transistor is connected to the base of the second bipolar junction transistor, a first resistor connected between an emitter of the first bipolar junction transistor and the common ground and a second resistor connected between the common ground and a first node, wherein the temperature voltage is provided to the first node across the second resistor.
    Type: Application
    Filed: January 9, 2009
    Publication date: August 20, 2009
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventor: Giovanni Galli
  • Patent number: 7554276
    Abstract: A safety circuit for providing protection against failures that impact safety of an inverter circuit driving a Permanent Magnet Synchronous Motor (PMSM) including high and low side switches connected in a bridge and driven by a gate driver circuit during operation of the PMSM in a field weakening mode, the gate driver circuit including stages for driving the high and low side switches, the safety circuit comprising a main power supply and a back-up power supply for supplying voltage to the gate driver circuit driving the switches of the bridge of the inverter circuit, wherein if the main power supply fails to deliver adequate power to the gate driver circuit, the back-up power supply provides power to the gate driver circuit to allow the gate driver circuit to turn ON the low side switches and turn OFF the high side switches.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: June 30, 2009
    Assignee: International Rectifier Corporation
    Inventors: Giovanni Galli, Massimo Grasso, Cesare Bocchiola
  • Publication number: 20090154035
    Abstract: A circuit arrangement includes an ESD protection circuit for protecting a circuit node of the circuit arrangement against electrostatic discharge. The circuit arrangement includes a control circuit configured to deactivate the ESD protection circuit in response to a state signal representing a state of operation of the circuit arrangement.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 18, 2009
    Inventors: Maurizio Galvano, Giovanni Galli
  • Publication number: 20080063027
    Abstract: A temperature sensor circuit in accordance with an embodiment of the present invention includes a temperature sensing element operable to provide a temperature voltage that is linearly related to the absolute temperature of the circuit. The temperature sensing element includes a first bi-polar junction transistor and a second bipolar junction transistor connected between a supply voltage and a common ground, wherein the base of first bipolar junction transistor is connected to the base of the second bipolar junction transistor, a first resistor connected between an emitter of the first bipolar junction transistor and the common ground and a second resistor connected between the common ground and a first node, wherein the temperature voltage is provided to the first node across the second resistor.
    Type: Application
    Filed: March 15, 2007
    Publication date: March 13, 2008
    Inventor: Giovanni Galli
  • Publication number: 20080054998
    Abstract: A driver integrated circuit for driving at least one high voltage half bridge stage. The driver including a filter circuit for filtering a signal provided to the half bridge stage, a minimum pulse width of the signal being near a constant time of the filter, wherein the filter circuit prevents distortions introduced when the signal is at its minimum pulse width from being passed to the half bridge stage.
    Type: Application
    Filed: March 9, 2007
    Publication date: March 6, 2008
    Inventors: Christian Locatelli, Giovanni Galli
  • Patent number: 7227331
    Abstract: A circuit for protecting against controller failure wherein the controller provides control signals for controlling a DC to AC inverter fed by a DC bus and driving a permanent magnet motor, the circuit comprising a first circuit for monitoring the DC bus voltage and, in the event the DC bus voltage exceeds a first threshold due to a counter EMF generated by the motor, for producing a signal to the controller to provide a switch state to the inverter whereby the counter EMF is dissipated substantially in a motor circuit resistance of the permanent magnet motor as a result of a short circuit condition provided by the switch state of the inverter, thereby preventing the DC bus voltage of the inverter from exceeding the first threshold and causing the permanent magnet motor speed to be reduced.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: June 5, 2007
    Assignee: International Rectifier Corporation
    Inventors: Giovanni Galli, Toshio Takahashi
  • Publication number: 20070063661
    Abstract: A safety circuit for providing protection against failures that impact safety of an inverter circuit driving a Permanent Magnet Synchronous Motor (PMSM) including high and low side switches connected in a bridge and driven by a gate driver circuit during operation of the PMSM in a field weakening mode, the gate driver circuit including stages for driving the high and low side switches, the safety circuit comprising a main power supply and a back-up power supply for supplying voltage to the gate driver circuit driving the switches of the bridge of the inverter circuit, wherein if the main power supply fails to deliver adequate power to the gate driver circuit, the back-up power supply provides power to the gate driver circuit to allow the gate driver circuit to turn ON the low side switches and turn OFF the high side switches.
    Type: Application
    Filed: September 20, 2006
    Publication date: March 22, 2007
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Giovanni Galli, Massimo Grasso, Cesare Bocchiola
  • Publication number: 20060181239
    Abstract: A circuit for protecting against controller failure wherein the controller provides control signals for controlling a DC to AC inverter fed by a DC bus and driving a permanent magnet motor, the circuit comprising a first circuit for monitoring the DC bus voltage and, in the event the DC bus voltage exceeds a first threshold due to a counter EMF generated by the motor, for producing a signal to the controller to provide a switch state to the inverter whereby the counter EMF is dissipated substantially in a motor circuit resistance of the permanent magnet motor as a result of a short circuit condition provided by the switch state of the inverter, thereby preventing the DC bus voltage of the inverter from exceeding the first threshold and causing the permanent magnet motor speed to be reduced.
    Type: Application
    Filed: February 13, 2006
    Publication date: August 17, 2006
    Inventors: Giovanni Galli, Toshio Takahashi
  • Patent number: 6859087
    Abstract: A gate drive integrated circuit for switching power transistors using an external controller includes a gate driving capability and low quiescent current and allows use of a bootstrap supply technique for providing the logic supply voltage. The gate driver integrated circuit detects power transistor desaturation, protecting a desaturated transistor from transient over voltages by smoothly turning off the desaturated transistor via a soft shutdown sequence. A fault control circuit of the gate driver integrated circuit manages protection of supply under-voltage and transistor desaturation and is capable of communicating with a plurality of gate driver integrated circuits in a multi-phase system using a dedicated local network.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: February 22, 2005
    Assignee: International Rectifier Corporation
    Inventors: Giovanni Galli, Marco Giandalia, Andrea Merello
  • Patent number: 6809571
    Abstract: A power control circuit includes sensing circuitry for sensing information about operation of a power device such as an IGBT or other power FET. The sensing circuitry receives a sense input signal from the power device through a gating device such as a diode. The power control circuit also includes active impedance circuitry for preventing the sense input signal from including spurious information received from the gating device. For example, if the gating device is a diode across which negative spikes can be capacitively coupled, the active impedance circuitry can prevent the negative spikes from reaching the sensing circuitry when the diode is off. The active impedance circuitry can take the form of a transistor connected between a power supply and a sensing node. The active impedance device can be switched on by a comparator when the voltage across the power device exceeds a reference voltage, indicating the power device is off.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: October 26, 2004
    Assignee: International Rectifier Corporation
    Inventors: Massimo Grasso, Giovanni Galli
  • Publication number: 20040120090
    Abstract: A gate drive integrated circuit for switching power transistors using an external controller includes a gate driving capability and low quiescent current and allows use of a bootstrap supply technique for providing the logic supply voltage. The gate driver integrated circuit detects power transistor desaturation, protecting a desaturated transistor from transient over voltages by smoothly turning off the desaturated transistor via a soft shutdown sequence. A fault control circuit of the gate driver integrated circuit manages protection of supply under-voltage and transistor desaturation and is capable of communicating with a plurality of gate driver integrated circuits in a multi-phase system using a dedicated local network.
    Type: Application
    Filed: October 29, 2003
    Publication date: June 24, 2004
    Applicant: International Rectifier Corporation
    Inventors: Giovanni Galli, Marco Giandalia, Andrea Merello
  • Patent number: 6552584
    Abstract: A final stage for a high-speed comparator, and a method of driving an electric load having a capacitive component are disclosed. The final stage comprises a first or pull-up component and a second or pull-down component which are connected in series with each other between a first or supply voltage reference and a second voltage reference. A dynamic drive device and a separate static drive device are coupled to each component of the output stage. Each component of the final stage is driven separately according to whether it is in a static or a dynamic load condition.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: April 22, 2003
    Assignee: STMicroelectronics S.r.l.
    Inventor: Giovanni Galli
  • Publication number: 20030062947
    Abstract: A power control circuit includes sensing circuitry for sensing information about operation of a power device such as an IGBT or other power FET. The sensing circuitry receives a sense input signal from the power device through a gating device such as a diode. The power control circuit also includes active impedance circuitry for preventing the sense input signal from including spurious information received from the gating device. For example, if the gating device is a diode across which negative spikes can be capacitively coupled, the active impedance circuitry can prevent the negative spikes from reaching the sensing circuitry when the diode is off. The active impedance circuitry can take the form of a transistor connected between a power supply and a sensing node. The active impedance device can be switched on by a comparator when the voltage across the power device exceeds a reference voltage, indicating the power device is off.
    Type: Application
    Filed: October 1, 2001
    Publication date: April 3, 2003
    Applicant: International Rectifier Corporation
    Inventors: Massimo Grasso, Giovanni Galli
  • Patent number: 6388302
    Abstract: The invention relates to a ground-compatible inhibit circuit structure and method, for circuits integrated in a semiconductor substrate which is unrelated to ground potential. The circuit structure is integrated in the same substrate as an associated circuit to be inhibited, and the substrate is covered with an epitaxial layer accommodating the components of the inhibit circuit structure. It includes a stable internal voltage reference and a circuit portion for comparing this reference with an inhibit signal in order to block the associated circuit upon a predetermined threshold value being exceeded, even in a condition of the signal potential being higher than the supply potential to the circuit. Advantageously, the epitaxial layer of each well is always at a potential higher than or equal to that of the substrate.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: May 14, 2002
    Assignee: STMicroelectronics S.r.l.
    Inventor: Giovanni Galli
  • Publication number: 20020008251
    Abstract: A final stage for a high-speed comparator, and a method of driving an electric load having a capacitive component are disclosed. The final stage comprises a first or pull-up component and a second or pull-down component which are connected in series with each other between a first or supply voltage reference and a second voltage reference. A dynamic drive device and a separate static drive device are coupled to each component of the output stage. Each component of the final stage is driven separately according to whether it is in a static or a dynamic load condition.
    Type: Application
    Filed: April 30, 2001
    Publication date: January 24, 2002
    Inventor: Giovanni Galli
  • Patent number: 6297664
    Abstract: An active precision termination of the type incorporated in a voltage regulator for feeding the lines of an external bus is presented. Each termination includes a matching impedance connected in series to a switch formed by a MOS transistor, including a cell formed by a plurality of circuit branches provided in parallel and coupled to a unique output terminal. Each branch includes an input coupled to the series of the impedance and of the switch and receiving a control voltage signal. The body terminal of each MOS transistor receives a corresponding control signal via an inverter, whereas the control terminal of each MOS transistor receives a corresponding control voltage signal.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: October 2, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventor: Giovanni Galli
  • Patent number: 6259297
    Abstract: A protection circuit is disclosed for a bipolar power transistor for preventing the operating point thereof from leaving a useful operating area. The protection circuit includes a sense resistor connected between an input supply voltage and a collector of the bipolar power transistor; a first branch circuit, including a first diode connected to the collector of the bipolar power transistor and a first current source connected between a common output node and the first diode; a second branch circuit, including a second diode and a second current source connected between the second diode and the common output node; and a third branch circuit. A short-circuit current level of the bipolar power transistor at relatively low voltage levels of the input supply voltage is based upon current levels for the first current source and the second current source and a resistance value of the sense resistor connected to the bipolar power transistor.
    Type: Grant
    Filed: May 4, 1999
    Date of Patent: July 10, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventor: Giovanni Galli
  • Patent number: 5714905
    Abstract: A method, and associated circuit, which can prevent the latch-down phenomenon in transistors which are protected from going out of their SOAs.By supplementing the first protection circuit (against moving out of the SOA) with a second protection circuit which can drive the control terminal of the transistor such that when, upon the voltage across the main conduction path of the transistor being increased, the value of the current flowing through said path would tend, due to the first protection, to drop below a predetermined lower limit, that value can be kept approximately constant and unaffected by the load as seen from the output terminal of the transistor; the transistor will at all events supply the load with some current up to the acceptable limit VMAX by the transistor.
    Type: Grant
    Filed: October 27, 1995
    Date of Patent: February 3, 1998
    Assignee: Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Giovanni Galli, Giuseppe Scilla