Abstract: A random number generator uses the output of a true random generator to alter the behavior of a pseudo-random number generator. The alteration is performed by a mixing logic that builds a random seed for the pseudo-random number generator and includes a generator of an alteration signal, the generation of which exploits the random instant of arrival of the bits outgoing from the true random generator. The alteration signal is obtained by processing the seed by means of the pseudo-random sequence.

Abstract: A random number generator uses the output of a true random generator to alter the behavior of a pseudo-random number generator. The alteration is performed by a mixing logic that builds a random seed for the pseudo-random number generator and includes a generator of an alteration signal, the generation of which exploits the random instant of arrival of the bits outgoing from the true random generator. The alteration signal is obtained by processing the seed by means of the pseudo-random sequence.

Abstract: Process for the electromagnetic modelling of electronic components and systems, for the extraction of certain electrical parameters, such as the static V-I characteristics and the input and output impedance, the output switching times in particular conditions of load and the transition times of the protection diodes. A test machine of the commercial type is used for these measurements, by generating stimulus signals and measuring the correlated signals, the test machine being suitable for parametric direct current measurements, functional tests and digital integrated circuit timing and also being used as a time domain reflectometer. The measurement phase is followed by a simulation phase during which the electric parameters used for modelling electronic components and systems are extracted.

Abstract: A device for transmitting and decoding audio-visual streams arranged in accordance with standard ISO/IEC 11172 is provided. The device (DEC) comprises: interfaces (CSC, IA, CIS) for connection to a local storage device (MEL) or to a telecommunications network (2, 3), for receiving streams from remote sources or send streams to remote receivers; demultiplexing and synchronisation means (DES) for splitting the audio-visual streams into constituent audio, video and private data streams and extracting synchronisation information from the streams, and means (DA, DV, UA, UV) for decoding audio and video streams and present audio and video signals in analog form at the output. A controller (CNT) is to control and supervise demultiplexing and decoding operations.

Abstract: The video control circuit is particularly adapted to multimedia applicati, wherein image transmission services are offered in addition to usual telephone speech and data transmission services. The circuit is capable of processing both photographic and graphic video images, satisfying both the relevant CCIR standards and the specifications proper to personal computers, VGA EGA, etc. so as to allow the representation of either types of images on an only type of display. To this end, it generates both timings proper to the CCIR standards, for a resolution of 720 columns per 480 lines, with an upper representation limit of graphic planes of 1024 columns per 1024 lines.

Abstract: An electronic circuit for generating error detection codes in digital sigs organized into serial data blocks, which derives the error code from the coefficients of a remainder polynomial obtained from the division of a dividend polynomial, whose coefficients are the bits of each serial block, and a convenient divisor polynomial. The circuit has a shift register wherein at the beginning of each serial data block the reset and the first datum load are performed in a single clock interval.

Abstract: A multimedia protocol interface for 64K Kbit/s data flow, organized accorg to the frame structure specified in CCITT Recommendation H221 and transmitted and received according to the standard 64 kbit/s protocol or 256 kbit/s 10 M protocol, adapted to operate autonomously or aided by an external microprocessor and has a receiver, a transmitter, a control block and circuitry for the local test of the operation of the interface itself. The external microprocessor can read both the received data and the information relevant to the receiver conditions, and can also send data to be transmitted or can read information relevant to the transmitter conditions. The receiver receives the data and clock and synchronism signals and emits at the output the received data, associated with timing signals useful for the external devices connected to the interface for data recovery. Analogously, the transmitter emits the data, receives clock an synchronism signals and supplies data and timings to the external devices.