Patents by Inventor Giovanni Gozzini
Giovanni Gozzini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6512851Abstract: A word recognition device uses an associative memory to store a plurality of coded words in such a way that a weight is associated with each character of the alphabet of the stored words, wherein equal weights correspond to equal characters. To perform the recognition, a dictionary of words is first chosen; this is stored in the associative memory according to a pre-determined code; a string of characters which correspond to a word to be recognized is received; a sequence of weights corresponding to the string of characters received is supplied to the associative memory; the distance between the word to be recognized and at least some of the stored words is calculated in parallel as the sum of the difference between the weights of each character of the word to be recognized and the weights of each character of the stored words; the minimum distance is identified; and the word stored in the associative memory having the minimum distance is stored.Type: GrantFiled: October 9, 2001Date of Patent: January 28, 2003Assignee: STMicroelectronics S.r.l.Inventors: Loris Navoni, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Alan Kramer, Pierluigi Rolandi
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Publication number: 20030014240Abstract: A memory device includes an associative memory for the storage of data belonging to a plurality of classes. The associative memory comprises a plurality of memory locations aligned along rows and columns for the storage of data along the rows. Each memory row comprises a plurality of groups of memory locations, each storing a respective datum, wherein groups of memory locations adjacent along one and the same row store data belonging to different classes. Groups of memory locations adjacent in the direction of the columns and disposed on different rows store data belonging to one and the same class. Each class comprises data having a different maximum lengths. The device is particularly suitable for the storage of words belonging to a dictionary for automatic recognition of words in a written text.Type: ApplicationFiled: April 30, 2002Publication date: January 16, 2003Applicant: STMicroelectronics S.r.I.Inventors: Loris Navoni, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Alan Kramer, Pierluigi Rolandi
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Patent number: 6501284Abstract: Within a capacitive fingerprint detection device, finger detection is provided by a capacitive grid overlying the fingerprint sensor electrodes to measure the absolute capacitance of the finger placed on the sensor surface. The capacitive measurement is converted to a representative frequency, which is then compared to a reference frequency or frequency range to determine whether the measured capacitance matches the expected bio-characteristics of living skin tissue. The finger detection thus provides anti-spoofing protection for the fingerprint detection device.Type: GrantFiled: August 28, 2000Date of Patent: December 31, 2002Assignee: STMicroelectronics, Inc.Inventor: Giovanni Gozzini
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Patent number: 6442295Abstract: A word recognition device uses an associative memory to store a plurality of coded words in such a way that a weight is associated with each character of the alphabet of the stored words, wherein equal weights correspond to equal characters. To perform the recognition, a dictionary of words is first chosen; this is stored in the associative memory according to a pre-determined code; a string of characters which correspond to a word to be recognized is received; a sequence of weights corresponding to the string of characters received is supplied to the associative memory; the distance between the word to be recognized and at least some of the stored words is calculated in parallel as the sum of the difference between the weights of each character of the word to be recognized and the weights of each character of the stored words; the minimum distance is identified; and the word stored in the associative memory having the minimum distance is stored.Type: GrantFiled: February 12, 1998Date of Patent: August 27, 2002Assignee: STMicroelectronics S.r.l.Inventors: Loris Navoni, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Alan Kramer, Pierluigi Rolandi
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Patent number: 6415293Abstract: A memory device having an associative memory for the storage of data belonging to a plurality of classes. The associative memory has a plurality of memory locations aligned along rows and columns for the storage of data along the rows. Each memory row has a plurality of groups of memory locations, each storing a respective datum, wherein groups of memory locations adjacent along one and the same row store data belonging to different classes. Groups of memory locations adjacent in the direction of the columns and disposed on different rows store data belonging to one and the same class. Each class has data having a different maximum lengths. The device is particularly suitable for the storage of words belonging to a dictionary for automatic recognition of words in a written text.Type: GrantFiled: February 12, 1998Date of Patent: July 2, 2002Assignee: STMicroelectronics S.r.l.Inventors: Loris Navoni, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Alan Kramer, Pierluigi Rolandi
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Publication number: 20020038295Abstract: A memory device includes an associative memory for the storage of data belonging to a plurality of classes. The associative memory comprises a plurality of memory locations aligned along rows and columns for the storage of data along the rows. Each memory row comprises a plurality of groups of memory locations, each storing a respective datum, wherein groups of memory locations adjacent along one and the same row store data belonging to different classes. Groups of memory locations adjacent in the direction of the columns and disposed on different rows store data belonging to one and the same class. Each class comprises data having a different maximum lengths. The device is particularly suitable for the storage of words belonging to a dictionary for automatic recognition of words in a written text.Type: ApplicationFiled: February 12, 1998Publication date: March 28, 2002Inventors: LORIS NAVONI, ROBERTO CANEGALLO, MAURO CHINOSI, GIOVANNI GOZZINI, ALAN KRAMER, PIERLUIGI ROLANDI
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Publication number: 20020034329Abstract: A word recognition device uses an associative memory to store a plurality of coded words in such a way that a weight is associated with each character of the alphabet of the stored words, wherein equal weights correspond to equal characters. To perform the recognition, a dictionary of words is first chosen; this is stored in the associative memory according to a pre-determined code; a string of characters which correspond to a word to be recognized is received; a sequence of weights corresponding to the string of characters received is supplied to the associative memory; the distance between the word to be recognized and at least some of the stored words is calculated in parallel as the sum of the difference between the weights of each character of the word to be recognized and the weights of each character of the stored words; the minimum distance is identified; and the word stored in the associative memory having the minimum distance is stored.Type: ApplicationFiled: October 9, 2001Publication date: March 21, 2002Applicant: STMicroelectronics S.r.IInventors: Loris Navoni, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Alan Kramer, Pierluigi Rolandi
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Publication number: 20010019629Abstract: A word recognition device uses an associative memory to store a plurality of coded words in such a way that a weight is associated with each character of the alphabet of the stored words, wherein equal weights correspond to equal characters. To perform the recognition, a dictionary of words is first chosen; this is stored in the associative memory according to a pre-determined code; a string of characters which correspond to a word to be recognized is received; a sequence of weights corresponding to the string of characters received is supplied to the associative memory; the distance between the word to be recognized and at least some of the stored words is calculated in parallel as the sum of the difference between the weights of each character of the word to be recognized and the weights of each character of the stored words; the minimum distance is identified; and the word stored in the associative memory having the minimum distance is stored.Type: ApplicationFiled: February 12, 1998Publication date: September 6, 2001Inventors: LORIS NAVONI, ROBERTO CANEGALLO, MAURO CHINOSI, GIOVANNI GOZZINI, ALAN KRAMER, PIERLUIGI ROLANDI
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Patent number: 6252802Abstract: The charge injection circuit of this invention comprises at least one pair of floating gate MOS transistors having source and drain terminals which are coupled together and to an injection node, and at least one corresponding pair of generators of substantially step-like voltage signals having an initial value and a final value, and having outputs respectively coupled to the control terminals of said transistors. The signal generators are such that the initial value of a first of the signals is substantially the equal of the final value of a second of the signals, and that the final value of the first signal is substantially the equal of the initial value of the second signal.Type: GrantFiled: August 9, 2000Date of Patent: June 26, 2001Assignee: STMicroelectronics S.r.l.Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini
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Patent number: 6236592Abstract: The charge injection circuit of this invention comprises at least one pair of floating gate MOS transistors having source and drain terminals which are coupled together and to an injection node, and at least one corresponding pair of generators of substantially step-like voltage signals having an initial value and a final value, and having outputs respectively coupled to the control terminals of said transistors. The signal generators are such that the initial value of a first of the signals is substantially the equal of the final value of a second of the signals, and that the final value of the first signal is substantially the equal of the initial value of the second signal.Type: GrantFiled: August 13, 1999Date of Patent: May 22, 2001Assignee: STMicroelectronics S.r.l.Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini
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Patent number: 6110791Abstract: A variable capacitor in a semiconductor device is described in which the capacitance is varied by the movement of a dielectric material in the space between the plates of the capacitor in response to an external stimulus. A method of making such a variable capacitor is also described in which the capacitor is built in a layered structure with the top layer including a portion of dielectric material extending into the space between the capacitor plates. After formation of the top layer, an intermediate layer is etched away to render the top layer flexible to facilitate movement of the dielectric material in the space between the capacitor plates.Type: GrantFiled: July 26, 1999Date of Patent: August 29, 2000Assignee: STMicroelectronics, Inc.Inventors: Alexander Kalnitsky, Alan Kramer, Vito Fabbrizio, Giovanni Gozzini, Bhusan Gupta, Marco Sabatini
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Patent number: 6014044Abstract: This invention relates to a voltage comparator with an input for an analog signal and an output for a digital signal, comprising an inverter which has an input coupled to the comparator input and an output coupled to the comparator output, and comprising at least two MOS transistors coupled to each other, at least one of the two MOS transistors being of the floating gate type.Type: GrantFiled: October 29, 1997Date of Patent: January 11, 2000Assignee: STMicroelectronics S.r.l.Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Philip Leong, Marco Onorato, Pier Luigi Rolandi, Marco Sabatini
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Patent number: 5990816Abstract: The present invention relates to a digital-to-analog converter having a plurality of inputs for digital signals and an output for an analog signal. It comprises a current amplification circuit having an input and an output coupled to the converter output, and a plurality of floating gate MOS transistors corresponding to the plurality of converter inputs and having their source terminals coupled together and to a first reference of potential. The converter has drain terminals coupled together and to the input of the amplification circuit, and has control terminals coupleable, under control from the inputs of the plurality, to different references of potential having selected fixed values.Type: GrantFiled: September 30, 1997Date of Patent: November 23, 1999Assignee: STMicroelectronics S.r.l.Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Philip Leong, Pier Luigi Rolandi, Marco Sabatini
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Patent number: 5982608Abstract: A variable capacitor in a semiconductor device is described in which the capacitance is varied by the movement of a dielectric material in the space between the plates of the capacitor in response to an external stimulus. A method of making such a variable capacitor is also described in which the capacitor is built in a layered structure with the top layer including a portion of dielectric material extending into the space between the capacitor plates. After formation of the top layer, an intermediate layer is etched away to render the top layer flexible to facilitate movement of the dielectric material in the space between the capacitor plates.Type: GrantFiled: January 13, 1998Date of Patent: November 9, 1999Assignee: STMicroelectronics, Inc.Inventors: Alexander Kalnitsky, Alan Kramer, Vito Fabbrizio, Giovanni Gozzini, Bhusian Guptz, Marco Sabatini
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Patent number: 5973949Abstract: An input structure for associative memories, including an array of elementary cells, a number of input lines, a number of output lines, a number of address lines, and a number of enable lines. Each elementary cell is formed by a D flip-flop having a data input coupled to one of the address lines and an enable input coupled to one of the enable lines, and by a switch coupled between an input line and an output line, and having a control input coupled to the output of a respective latch to selectively couple the respective input line and output line according to the data stored in the latch.Type: GrantFiled: September 30, 1997Date of Patent: October 26, 1999Assignee: STMicroelectronics S.r.l.Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini
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Patent number: 5952946Abstract: The present invention relates to a digital-to-analog converter having a plurality of inputs for digital signals, and an output for an analog signal. It also contains a charge integration circuit having an input and an output coupled to the converter output, and a plurality of floating gate MOS transistors corresponding to the plurality of converter inputs, the MOS transistors all having their source and drain terminals coupled together and to the input of the integration circuit, and having control terminals coupleable, under control from the plurality of inputs of digital signals, to different reference voltages having selected fixed values.Type: GrantFiled: September 30, 1997Date of Patent: September 14, 1999Assignee: STMicroelectronics, S.r.l.Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini
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Patent number: 5946235Abstract: The charge injection circuit of this invention comprises at least one pair of floating gate MOS transistors having source and drain terminals which are coupled together and to an injection node, and at least one corresponding pair of generators of substantially step-like voltage signals having an initial value and a final value, and having outputs respectively coupled to the control terminals of said transistors. The signal generators are such that the initial value of a first of the signals is substantially the equal of the final value of a second of the signals, and that the final value of the first signal is substantially the equal of the initial value of the second signal.Type: GrantFiled: September 30, 1997Date of Patent: August 31, 1999Assignee: STMicroelectronics S.r.l.Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini
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Patent number: 5901085Abstract: A programmable reference voltage source includes a nonvolatile memory cell, the floating-gate region of which stores electric charges determining a memorized threshold value. The drain terminal of the cell is biased at a constant voltage, and the source terminal is coupled to a constant-current source and to the inverting input of an operational amplifier having the noninverting input coupled to a reference voltage and the output coupled to the gate terminal of the cell. By defining the threshold of the cell as the gate voltage (measured with respect to ground) capable of causing the cell to be flown by the current set by the current source, the output voltage of the operational amplifier equals the threshold and may be used as a programmable reference in analog memories.Type: GrantFiled: September 30, 1997Date of Patent: May 4, 1999Assignee: STMicroelectronics, S.r.l.Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini
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Patent number: 5880993Abstract: To check the programming of a nonvolatile memory cell storing an actual threshold value, the drain terminal of the cell is biased at a constant voltage; the gate terminal is biased at a check voltage; the cell is supplied with a predetermined current to determine a gate-source voltage drop related to the actual threshold value; and the voltage at the source terminal is supplied to an input of an operational amplifier. In an open-loop configuration, the desired threshold value of the set predetermined current is supplied as the check voltage; the amplifier compares the source voltage with the ground; and switching of the amplifier indicates the desired threshold value has been reached. In a closed-loop configuration, the output of the operational amplifier is connected directly to the gate terminal of the cell, and supplies the desired threshold value directly.Type: GrantFiled: September 30, 1997Date of Patent: March 9, 1999Assignee: SGS-Thomson Microelectronics, S.r.l.Inventors: Alan Kramer, Roberto Canegallo, Mauro Chinosi, Giovanni Gozzini, Pier Luigi Rolandi, Marco Sabatini