Patents by Inventor Giovanni Ragasa Garbin

Giovanni Ragasa Garbin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230178428
    Abstract: A method includes providing a lead frame with a central metal plate and a plurality of leads extending away from the central metal plate, the central metal plate including an upper surface that includes a first mesa that is elevated from recessed regions, mounting a semiconductor die on the upper surface of central metal plate such that a lower surface of the semiconductor die is at least partially disposed on the first mesa, forming electrical interconnections between terminals of the semiconductor die and the leads, forming an encapsulant body on the central metal plate such that the semiconductor die is encapsulated by the encapsulant body and such that the leads protrude out from edge sides of the encapsulant body, and thinning the central metal plate from a rear surface of the central metal plate so as to isolate the first mesa at a lower surface of the encapsulant body.
    Type: Application
    Filed: December 6, 2021
    Publication date: June 8, 2023
    Inventors: Thorsten Meyer, Fee Hoon Wendy Wong, Thomas Behrens, Eric Lopez Bonifacio, Chau Fatt Chiang, Irmgard Escher-Poeppel, Giovanni Ragasa Garbin, Martin Gruber, Tien Shyang Law, Mohamad Azian Mohamed Azizi, Si Hao Vincent Yeo
  • Patent number: 11296015
    Abstract: A semiconductor device includes a carrier, a power semiconductor die that includes first and second opposite facing main surfaces, a side surface extending from the first main surface to the second main surface, and first and second electrodes disposed on the first and second main surfaces, respectively, a die attach material arranged between the carrier and the first electrode, wherein the die attach material forms a fillet at the side surface of the power semiconductor die, wherein a fillet height of the fillet is less than about 95% of a height of the power semiconductor die, wherein the height of the power semiconductor die is a length of the side surface, and wherein a maximum extension of the die attach material over edges of a main surface of the power semiconductor die facing the die attach material is less than about 200 micrometers.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: April 5, 2022
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Giovanni Ragasa Garbin, Chen Wen Lee, Benjamin Reichert, Peter Strobel
  • Publication number: 20210013132
    Abstract: A semiconductor device includes a carrier, a power semiconductor die that includes first and second opposite facing main surfaces, a side surface extending from the first main surface to the second main surface, and first and second electrodes disposed on the first and second main surfaces, respectively, a die attach material arranged between the carrier and the first electrode, wherein the die attach material forms a fillet at the side surface of the power semiconductor die, wherein a fillet height of the fillet is less than about 95% of a height of the power semiconductor die, wherein the height of the power semiconductor die is a length of the side surface, and wherein a maximum extension of the die attach material over edges of a main surface of the power semiconductor die facing the die attach material is less than about 200 micrometers.
    Type: Application
    Filed: September 29, 2020
    Publication date: January 14, 2021
    Inventors: Joachim Mahler, Giovanni Ragasa Garbin, Chen Wen Lee, Benjamin Reichert, Peter Strobel
  • Patent number: 10832992
    Abstract: A method includes providing a carrier, depositing a die attach material on the carrier, and arranging a semiconductor die on the die attach material, wherein a main surface of the semiconductor die facing the die attach material at least partly contacts the die attach material, wherein immediately after arranging the semiconductor die on the die attach material, a first maximum extension of the die attach material over edges of the main surface is less than about 100 micrometers.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: November 10, 2020
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Giovanni Ragasa Garbin, Chen Wen Lee, Benjamin Reichert, Peter Strobel
  • Publication number: 20190348347
    Abstract: A method includes providing a carrier, depositing a die attach material on the carrier, and arranging a semiconductor die on the die attach material, wherein a main surface of the semiconductor die facing the die attach material at least partly contacts the die attach material, wherein immediately after arranging the semiconductor die on the die attach material, a first maximum extension of the die attach material over edges of the main surface is less than about 100 micrometers.
    Type: Application
    Filed: July 22, 2019
    Publication date: November 14, 2019
    Inventors: Joachim Mahler, Giovanni Ragasa Garbin, Chen Wen Lee, Benjamin Reichert, Peter Strobel
  • Patent number: 10396015
    Abstract: A semiconductor device includes a carrier, a semiconductor die and a die attach material arranged between the carrier and the semiconductor die. A fillet height of the die attach material is less than about 95% of a height of the semiconductor die. A maximum extension of the die attach material over edges of a main surface of the semiconductor die facing the die attach material is less than about 200 micrometers.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: August 27, 2019
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Benjamin Reichert, Chen Wen Lee, Giovanni Ragasa Garbin, Peter Strobel
  • Publication number: 20180040530
    Abstract: A semiconductor device includes a carrier, a semiconductor die and a die attach material arranged between the carrier and the semiconductor die. A fillet height of the die attach material is less than about 95% of a height of the semiconductor die. A maximum extension of the die attach material over edges of a main surface of the semiconductor die facing the die attach material is less than about 200 micrometers.
    Type: Application
    Filed: July 31, 2017
    Publication date: February 8, 2018
    Inventors: Joachim Mahler, Benjamin Reichert, Chen Wen Lee, Giovanni Ragasa Garbin, Peter Strobel