Abstract: Methods for digital signal processing and transmission/reception systems utilizing the methods based on the use of LDPC codes, for example the LDPC code with a 3/5 code rate, in combination with a QAM modulation, for example the 16 QAM or 64 QAM or 256 QAM modulation. In transmission, a bit permutation (Demux) is carried out prior to the QAM constellation mapping function, and in reception, the bit permutation is carried out after the QAM constellation demapping function.

Abstract: Methods for digital signal processing and transmission/reception systems utilizing the methods based on the use of LDPC codes, for example the LDPC code with a 3/5 code rate, in combination with a QAM modulation, for example the 16 QAM or 64 QAM or 256 QAM modulation. In transmission, a bit permutation (Demux) is carried out prior to the QAM constellation mapping function, and in reception, the bit permutation is carried out after the QAM constellation demapping function.

Abstract: A method for repairing a turbomachine component comprises the steps of: setting up a laser cladding machine including a laser source a powder feeder and an air source, for repairing a narrow recess of the turbomachine component; defining a path including areas to be repaired by laser cladding within the narrow recess; moving forward the laser cladding machine or the turbomachine component, in order that said path is covered from the first to the second end point by the laser beam and the powder jet for repairing said areas to be repaired; moving backward the laser cladding machine or the turbomachine component, in order that said path is covered from the second to the first end point by the air jet for blowing away the powder in excess.

Abstract: Methods for digital signal processing and transmission/reception systems utilizing the methods based on the use of LDPC codes, for example the LDPC code with a 3/5 code rate, in combination with a QAM modulation, for example the 16 QAM or 64 QAM or 256 QAM modulation. In transmission, a bit permutation (Demux) is carried out prior to the QAM constellation mapping function, and in reception, the bit permutation is carried out after the QAM constellation demapping function.

Abstract: Methods for digital signal processing and transmission/reception systems utilizing the methods based on the use of LDPC codes, for example the LDPC code with a 3/5 code rate, in combination with a QAM modulation, for example the 16 QAM or 64 QAM or 256 QAM modulation. In transmission, a bit permutation (Demux) is carried out prior to the QAM constellation mapping function, and in reception, the bit permutation is carried out after the QAM constellation demapping function.

Abstract: Methods for digital signal processing and transmission/reception systems utilizing the methods based on the use of LDPC codes, for example a LDPC code with a 3/5 code rate, in combination with a QAM modulation, for example the 16QAM or 64QAM or 256QAM modulation. In transmission, a bit permutation (Demux) is carried out prior to the QAM constellation mapping function, and in reception, the bit permutation is carried out after the QAM constellation demapping function.

Abstract: The present invention relates to a method for processing digital signals and to a transmission/reception system implementing said method; the present invention is based on the use of LDPC codes, in particular the LDPC code of the DVB-S2 standard, in combination with a QAM modulation, in particular the 1024QAM and 4096QAM modulations; in transmission, a bit permutation (Demux) is carried out prior to the QAM constellation mapping function; in reception, the bit permutation is carried out after the QAM constellation demapping function.

Abstract: The present invention relates to a method for processing digital signals and to a transmission/reception system implementing said method; the present invention is based on the use of LDPC codes, in particular the LDPC code of the DVB-S2 standard, in combination with a QAM modulation, in particular the 1024QAM and 4096QAM modulations; in transmission, a bit permutation (Demux) is carried out prior to the QAM constellation mapping function; in reception, the bit permutation is carried out after the QAM constellation demapping function.

Abstract: Methods for digital signal processing and transmission/reception systems utilizing the methods based on the use of LDPC codes, for example a LDPC code with a 3/5 code rate, in combination with a QAM modulation, for example the 16QAM or 64QAM or 256QAM modulation. In transmission, a bit permutation (Demux) is carried out prior to the QAM constellation mapping function, and in reception, the bit permutation is carried out after the QAM constellation demapping function.

Abstract: A drive circuit for an emitter switching configuration of transistors having a cascode connection of a power bipolar transistor and of a power MOS transistor control the saturation level of the configuration in applications which provide highly variable collector currents. The drive circuit includes a circuit operable to apply a varying voltage value to the control terminal of the bipolar transistor. A current/voltage converter senses a collector current flowing in the power bipolar transistor and controls conduction of a first transistor responsive thereto, the conduction of the first transistor controlling the conduction of a second transistor so as to vary the control terminal voltage in proportion to the sensed collector current of the power bipolar transistor.

Abstract: A driving network for an emitter-switching circuit comprises a pair of cascode-configured transistors, the one of the bipolar type and the other of the MOS type, and the driving network is of the type comprising a driving block for respective conduction terminals and of said pair of transistors. The driving network (20, 30) further comprises sensor means in the driving block suitable for measuring a voltage to be compared with a reference value in a first comparator block. A negative feedback network between the output of the comparator and the driving block to provides a voltage value to said driving block to bias the conduction terminal of the bipolar transistor of the emitter-switching circuit in order to regulate the storage time thereof.

Abstract: A driving network for an emitter-switching circuit comprises a pair of cascode-configured transistors, the one of the bipolar type and the other of the MOS type, and the driving network is of the type comprising a driving block for respective conduction terminals and of said pair of transistors. The driving network (20, 30) further comprises sensor means in the driving block suitable for measuring a voltage to be compared with a reference value in a first comparator block. A negative feedback network between the output of the comparator and the driving block to provides a voltage value to said driving block to bias the conduction terminal of the bipolar transistor of the emitter-switching circuit in order to regulate the storage time thereof.

Abstract: A drive circuit for an emitter switching configuration of transistors having a cascode connection of a power bipolar transistor and of a power MOS transistor control the saturation level of the configuration in applications which provide highly variable collector currents. The drive circuit includes a circuit operable to apply a varying voltage value to the control terminal of the bipolar transistor. A current/voltage converter senses a collector current flowing in the power bipolar transistor and controls conduction of a first transistor responsive thereto, the conduction of the first transistor controlling the conduction of a second transistor so as to vary the control terminal voltage in proportion to the sensed collector current of the power bipolar transistor.