Patents by Inventor Gireesh Vijayakumar

Gireesh Vijayakumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250054910
    Abstract: A method for three-dimensionally stacking systems on chip with face to face hybrid bonding may include providing a first die including a driver gate driving a first via ladder coupled to a first top metal layer. The method may additionally include providing a second die including a load gate coupled to a second via ladder coupled to a second top metal layer. The method may also include stacking the first die and the second die three-dimensionally using face-to-face hybrid bonds to couple the first top metal layer to the second top metal layer. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Application
    Filed: December 20, 2023
    Publication date: February 13, 2025
    Inventors: Huseyin Ekin Sumbul, Edith Dallard, Fan Wu, Huichu Liu, Lita Yang, Matheus Trevisan Moreira, Anuradha Krishnan, Gireesh Vijayakumar, Valerio Catalano