Abstract: A bus interface device for interfacing a secondary peripheral bus with a system having a host CPU and a primary peripheral bus. The bus interface enables "virtual integration" of multiple physically distinct peripheral devices so that the collection of devices can function as a single integrated unit. The "virtually integrated" devices can share resources such as a dedicated bus, memory space, and memory bandwidth just as if the devices were physically integrated. An intelligent device configuration process and a dynamic internal memory map allow each peripheral device to be independently added to the system, removed from the system, or upgraded just as if each device was a completely separate peripheral. In this way, flexibility and modularity are maintained while achieving the advantages and memory cost reductions associated with physically integrated devices.