Abstract: A time-to-digital converter (TDC) includes a counter and a digital core. The counter is designed to generate a sequence of counts representing a number of transitions of interest of a first clock signal. The counter includes an asynchronous circuit and a synchronous circuit to respectively generate a first set of bits and a second set of bits of each of the sequence of numbers. The digital core is designed to process a pair of counts of the sequence.

Abstract: A time-to-digital converter (TDC) provided according to an aspect of the present disclosure identifies existence of jitter in either one of two periodic signals received as inputs. In an embodiment, jitter is detected by examining a first sequence of counts and a second sequence of counts respectively for a first periodic signal and a second periodic signal received as input signals, with the first sequence of counts representing respective time instances on a time scale at which a first sequence of edges with a first direction of the first periodic signal occur, and the second sequence of counts representing respective time instances on the time scale at which a second sequence of edges with the first direction of the second periodic signal occur.

Abstract: A time-to-digital converter (TDC) includes a counter and a digital core. The counter is designed to generate a sequence of counts representing a number of transitions of interest of a first clock signal. The counter includes an asynchronous circuit and a synchronous circuit to respectively generate a first set of bits and a second set of bits of each of the sequence of numbers. The digital core is designed to process a pair of counts of the sequence.

Abstract: A time-to-digital converter (TDC) provided according to an aspect of the present disclosure identifies existence of jitter in either one of two periodic signals received as inputs. In an embodiment, jitter is detected by examining a first sequence of counts and a second sequence of counts respectively for a first periodic signal and a second periodic signal received as input signals, with the first sequence of counts representing respective time instances on a time scale at which a first sequence of edges with a first direction of the first periodic signal occur, and the second sequence of counts representing respective time instances on the time scale at which a second sequence of edges with the first direction of the second periodic signal occur.

Abstract: A time-to-digital converter (TDC) includes a count logic and a digital core. The count logic generates a first sequence of counts representing a first sequence of edges of a first periodic signal, and a second sequence of counts representing a second sequence of edges of a second periodic signal. The digital core generates a sequence of outputs representing the phase differences between the first periodic signal and the second periodic signal from the first sequence of counts and the second sequence of counts. Each output is generated from a pair of successive edges of the first direction of one of the periodic signals and an individual one of the other periodic signal occurring between the pair, and the output is set equal to the minimum of difference of the individual one with the first value of the pair and the individual one with the second value of the pair.