Patents by Inventor Girolamo De Vincentiis

Girolamo De Vincentiis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4059736
    Abstract: Two processors UP1 and UP2, designed to test the operation of a pair of switching networks IN1 and IN2 in a telecommunication system through respective sets of peripheral interface units P11 etc. and P21 etc., are interconnected for parallel operation and are each linked with both sets of peripheral units via branched output and input multiples carrying outgoing and incoming messages. Each set of peripheral units is served by a respective bus bar BUS1, BUS2 connectable at one end, via an outgoing multiplexer MX12, MX22, to one of the branches of either output multiple 2, 3 and at the other end, via an incoming multiplexer MX11, MX21, to one of the branches of either input multiple 12, 13.
    Type: Grant
    Filed: June 17, 1976
    Date of Patent: November 22, 1977
    Assignee: CSELT - Centro Studi e Laboratori Telecomunicazioni S.p.A.
    Inventors: Giovanni Perucca, Flavio Melindo, Girolamo De Vincentiis