Patents by Inventor Giuseppe Abbondanza

Giuseppe Abbondanza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10475673
    Abstract: Various embodiments provide a reaction chamber including a support, a receptacle, and a sponge. The support includes a plurality of bars that are spaced from each other by a plurality of openings. Each of the bars has side surfaces that are slanted or tilted downward such that melted material may readily flow through the openings. The support is covered with a coating of silicon carbide to prevent materials from adhering to the support. The receptacle underlies the support and is configured to collect any melted material that is drained through the openings of the support. The sponge is positioned in the receptacle and under the support. The sponge is configured to absorb any melted material that is collected by the receptacle.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: November 12, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Ruggero Anzalone, Nicolo Frazzetto, Aldo Raciti, Marco Antonio Salanitri, Giuseppe Abbondanza, Giuseppe D'Arrigo
  • Patent number: 10153207
    Abstract: An embodiment described herein includes a method for producing a wafer of a first semiconductor material. Said first semiconductor material has a first melting temperature. The method comprises providing a crystalline substrate of a second semiconductor material having a second melting temperature lower than the first melting temperature, and exposing the crystalline substrate to a flow of first material precursors for forming a first layer of the first material on the substrate. The method further comprising bringing the crystalline substrate to a first process temperature higher than the second melting temperature, and at the same time lower than the first melting temperature, in such a way the second material melts, separating the second melted material from the first layer, and exposing the first layer to the flow of the first material precursor for forming a second layer of the first material on the first layer.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: December 11, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Ferruccio Frisina, Giuseppe Abbondanza
  • Publication number: 20180090350
    Abstract: Various embodiments provide a reaction chamber including a support, a receptacle, and a sponge. The support includes a plurality of bars that are spaced from each other by a plurality of openings. Each of the bars has side surfaces that are slanted or tilted downward such that melted material may readily flow through the openings. The support is covered with a coating of silicon carbide to prevent materials from adhering to the support. The receptacle underlies the support and is configured to collect any melted material that is drained through the openings of the support. The sponge is positioned in the receptacle and under the support. The sponge is configured to absorb any melted material that is collected by the receptacle.
    Type: Application
    Filed: September 26, 2017
    Publication date: March 29, 2018
    Inventors: Ruggero ANZALONE, Nicolo FRAZZETTO, Aldo RACITI, Marco Antonio SALANITRI, Giuseppe ABBONDANZA, Giuseppe D'ARRIGO
  • Patent number: 9576793
    Abstract: An embodiment of a method for manufacturing a semiconductor wafer includes providing a monocrystalline silicon wafer, epitaxially growing a first layer of a first material on the silicon wafer, and epitaxially growing a second layer of a second material on the first layer. For example, said first material may be monocrystalline silicon carbide, and said second material may be monocrystalline silicon.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: February 21, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Giuseppe Abbondanza
  • Publication number: 20160307800
    Abstract: An embodiment described herein includes a method for producing a wafer of a first semiconductor material. Said first semiconductor material has a first melting temperature. The method comprises providing a crystalline substrate of a second semiconductor material having a second melting temperature lower than the first melting temperature, and exposing the crystalline substrate to a flow of first material precursors for forming a first layer of the first material on the substrate. The method further comprising bringing the crystalline substrate to a first process temperature higher than the second melting temperature, and at the same time lower than the first melting temperature, in such a way the second material melts, separating the second melted material from the first layer, and exposing the first layer to the flow of the first material precursor for forming a second layer of the first material on the first layer.
    Type: Application
    Filed: June 27, 2016
    Publication date: October 20, 2016
    Inventors: Ferruccio Frisina, Giuseppe Abbondanza
  • Patent number: 9406504
    Abstract: An embodiment described herein includes a method for producing a wafer of a first semiconductor material. Said first semiconductor material has a first melting temperature. The method comprises providing a crystalline substrate of a second semiconductor material having a second melting temperature lower than the first melting temperature, and exposing the crystalline substrate to a flow of first material precursors for forming a first layer of the first material on the substrate. The method further comprising bringing the crystalline substrate to a first process temperature higher than the second melting temperature, and at the same time lower than the first melting temperature, in such a way the second material melts, separating the second melted material from the first layer, and exposing the first layer to the flow of the first material precursor for forming a second layer of the first material on the first layer.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: August 2, 2016
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Ferruccio Frisina, Giuseppe Abbondanza
  • Publication number: 20150325656
    Abstract: An embodiment of a method for manufacturing a semiconductor wafer includes providing a monocrystalline silicon wafer, epitaxially growing a first layer of a first material on the silicon wafer, and epitaxially growing a second layer of a second material on the first layer. For example, said first material may be monocrystalline silicon carbide, and said second material may be monocrystalline silicon.
    Type: Application
    Filed: June 30, 2015
    Publication date: November 12, 2015
    Inventor: GIUSEPPE ABBONDANZA
  • Patent number: 9099308
    Abstract: An embodiment of a method for manufacturing a semiconductor wafer includes providing a monocrystalline silicon wafer, epitaxially growing a first layer of a first material on the silicon wafer, and epitaxially growing a second layer of a second material on the first layer. For example, said first material may be monocrystalline silicon carbide, and said second material may be monocrystalline silicon.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: August 4, 2015
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Giuseppe Abbondanza
  • Publication number: 20130112995
    Abstract: An embodiment of a method for manufacturing a semiconductor wafer includes providing a monocrystalline silicon wafer, epitaxially growing a first layer of a first material on the silicon wafer, and epitaxially growing a second layer of a second material on the first layer. For example, said first material may be monocrystalline silicon carbide, and said second material may be monocrystalline silicon.
    Type: Application
    Filed: April 29, 2011
    Publication date: May 9, 2013
    Applicant: STMicroelectronics S.r.l.
    Inventor: Giuseppe Abbondanza
  • Publication number: 20100025696
    Abstract: The process according to the present invention is adapted to produce a silicon carbide substrate for microelectronic applications; it comprises the following steps: a) providing a conductive silicon carbide wafer, and b) growing an epitaxial layer of intrinsic silicon carbide on said wafer.
    Type: Application
    Filed: September 19, 2007
    Publication date: February 4, 2010
    Inventors: Giuseppe Abbondanza, Danilo Crippa
  • Publication number: 20070264807
    Abstract: The present invention relates to a process for cleaning the reaction chamber (12) of a CVD reactor, comprising the steps of heating the chamber walls to a suitable temperature and introducing a gas flow into the chamber, this cleaning process may be advantageously used within an operating process of a CVD reactor for depositing semiconductor material onto substrates inside a chamber; this operating process envisages a growth process comprising the sequential and cyclical loading of the substrates into the chamber (12), deposition of semiconductor material onto the substrates and unloading of the substrates from the chamber (12); after unloading a process for cleaning the chamber (12) is performed. The invention also relates to process for cleaning the entire CVD reactor, which envisages, together with heating, the presence of chemical etching components in the gas flow.
    Type: Application
    Filed: July 12, 2005
    Publication date: November 15, 2007
    Inventors: Stefano Leone, Marco Mauceri, Giuseppe Abbondanza, Danilo Crippa, Gianluca Valente, Maurizio Masi, Franco Preti