Abstract: A circuit is operated by receiving an input reference signal at an input node, determining a scaling ratio based on the input reference signal, generating a digital input signal as a function of the determined scaling ratio, converting the digital input signal into an analog signal that is a scaled replica of the input reference signal, and providing the analog signal at an output node of the circuit and then, after a duration of time, coupling the input reference signal to the output node.

Abstract: An apparatus includes a digital-to-analog converter coupled in series with a source follower, wherein the digital-to-analog converter is configured to control a current flowing through the source follower, and an amplifier having a first input coupled to a reference generator, a second input coupled to a common node of the source follower and the digital-to-analog converter, and an output coupled to a gate of the source follower.

Abstract: An apparatus includes a digital-to-analog converter coupled in series with a source follower, wherein the digital-to-analog converter is configured to control a current flowing through the source follower, and an amplifier having a first input coupled to a reference generator, a second input coupled to a common node of the source follower and the digital-to-analog converter, and an output coupled to a gate of the source follower.

Abstract: A circuit is operated by receiving an input reference signal at an input node, determining a scaling ratio based on the input reference signal, generating a digital input signal as a function of the determined scaling ratio, converting the digital input signal into an analog signal that is a scaled replica of the input reference signal, and providing the analog signal at an output node of the circuit and then, after a duration of time, coupling the input reference signal to the output node.

Abstract: A half buffer circuit includes a current source coupled to a first node, a ground connection coupled to a second node, a feedback capacitor coupled between the first node and an output of the half buffer circuit, a transconductor element comprising a first input/output, a second input/output, and a transconductor element control input, and a switch network coupled between the first node and the second node. The first input/output is coupled to the output of the half buffer circuit. The second input/output is coupled to a ground connection. The switch network includes a first switch coupled between the first node and the second node, a second switch coupled between the first node and the transconductor element control input, and a third switch coupled between the second node and the transconductor element control input.

Abstract: A circuit includes an input node configured to receive an input reference signal. An output node is configured to provide a replica of the input reference signal with a respective scaling ratio to the input reference signal at the input node. A digital-to-analog converter has a reference input configured to receive the input reference signal from the input node, a digital input configured to receive a digital input signal having a digital signal value, and a digital-to-analog converter output configured to provide an output signal from the digital-to-analog converter resulting from conversion to analog of the digital input signal. The output node of the circuit is configured to sense the output signal from the digital-to-analog converter and to provide the replica of the input reference signal at the output node.

Abstract: A differential amplifier generates an output voltage waveform exhibiting a slew rate over a rise time. The amplifier is powered from a dc voltage input and includes a set of differential pairs having a bias current flowing therethrough and a Miller compensation capacitance. A comparator functions to compare a voltage at the dc voltage input against a reference voltage in order to detect when the voltage drops below the reference voltage. A gain stage controls the gain of the differential amplifier and a bias current control circuit controls the bias current of the differential amplifier. In response to the detection by the comparator of the voltage dropping below the reference voltage, the gain stage and the bias current control circuit decrease the gain of the amplifier and jointly decrease the bias current in order to maintain a value of the rise time.

Abstract: A circuit includes an input node configured to receive an input reference signal. An output node is configured to provide a replica of the input reference signal with a respective scaling ratio to the input reference signal at the input node. A digital-to-analog converter has a reference input configured to receive the input reference signal from the input node, a digital input configured to receive a digital input signal having a digital signal value, and a digital-to-analog converter output configured to provide an output signal from the digital-to-analog converter resulting from conversion to analog of the digital input signal. The output node of the circuit is configured to sense the output signal from the digital-to-analog converter and to provide the replica of the input reference signal at the output node.

Abstract: A differential amplifier generates an output voltage waveform exhibiting a slew rate over a rise time. The amplifier is powered from a dc voltage input and includes a set of differential pairs having a bias current flowing therethrough and a Miller compensation capacitance. A comparator functions to compare a voltage at the dc voltage input against a reference voltage in order to detect when the voltage drops below the reference voltage. A gain stage controls the gain of the differential amplifier and a bias current control circuit controls the bias current of the differential amplifier. In response to the detection by the comparator of the voltage dropping below the reference voltage, the gain stage and the bias current control circuit decrease the gain of the amplifier and jointly decrease the bias current in order to maintain a value of the rise time.