Patents by Inventor Giuseppe Davide Bruno

Giuseppe Davide Bruno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Level shifting circuit
    Patent number: 10418987
    Abstract: A level shifting circuit has an input configured to receive an input signal, wherein the input signal has symmetrical maximum and minimum voltages. The level shifting circuit further includes an output configured to provide an output signal, wherein the output signal has asymmetrical maximum and minimum voltages. The output signal is generated in response to the input signal. The output signal is applied to drive a gate terminal of a SiC MOSFET.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: September 17, 2019
    Assignee: STMicroelectronics KK
    Inventors: Luca Bartolomeo, Kazuo Eguchi, Giuseppe Davide Bruno
  • LEVEL SHIFTING CIRCUIT
    Publication number: 20180343005
    Abstract: A level shifting circuit has an input configured to receive an input signal, wherein the input signal has symmetrical maximum and minimum voltages. The level shifting circuit further includes an output configured to provide an output signal, wherein the output signal has asymmetrical maximum and minimum voltages. The output signal is generated in response to the input signal. The output signal is applied to drive a gate terminal of a SiC MOSFET.
    Type: Application
    Filed: August 1, 2018
    Publication date: November 29, 2018
    Applicant: STMicroelectronics KK
    Inventors: Luca Bartolomeo, Kazuo Eguchi, Giuseppe Davide Bruno
  • Level shifting circuit
    Patent number: 10063227
    Abstract: A level shifting circuit has an input configured to receive an input signal, wherein the input signal has symmetrical maximum and minimum voltages. The level shifting circuit further includes an output configured to provide an output signal, wherein the output signal has asymmetrical maximum and minimum voltages. The output signal is generated in response to the input signal. The output signal is applied to drive a gate terminal of a SiC MOSFET.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: August 28, 2018
    Assignee: STMicroelectronics KK
    Inventors: Luca Bartolomeo, Kazuo Eguchi, Giuseppe Davide Bruno
  • LEVEL SHIFTING CIRCUIT
    Publication number: 20180191341
    Abstract: A level shifting circuit has an input configured to receive an input signal, wherein the input signal has symmetrical maximum and minimum voltages. The level shifting circuit further includes an output configured to provide an output signal, wherein the output signal has asymmetrical maximum and minimum voltages. The output signal is generated in response to the input signal. The output signal is applied to drive a gate terminal of a SiC MOSFET.
    Type: Application
    Filed: January 3, 2017
    Publication date: July 5, 2018
    Applicant: STMicroelectronics KK
    Inventors: Luca Bartolomeo, Kazuo Eguchi, Giuseppe Davide Bruno