Patents by Inventor Giuseppe Scilla
Giuseppe Scilla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10250233Abstract: A semiconductor substrate includes a first portion and a second portion. The first portion of the substrate has a first deformation-stress sensor capable of supplying a first stress signal. The second portion of the substrate has a second deformation-stress sensor capable of supplying a second stress signal. The first stress signal and second stress signal are processed by a circuit to produce a compensation signal. The compensation signal is applied in feedback to one of the first and second stress signals to compensate for variations induced in said one of the first and second stress signals by stresses in the semiconductor substrate.Type: GrantFiled: February 21, 2017Date of Patent: April 2, 2019Assignee: STMicroelectronics S.r.l.Inventor: Giuseppe Scilla
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Publication number: 20180026609Abstract: A semiconductor substrate includes a first portion and a second portion. The first portion of the substrate has a first deformation-stress sensor capable of supplying a first stress signal. The second portion of the substrate has a second deformation-stress sensor capable of supplying a second stress signal. The first stress signal and second stress signal are processed by a circuit to produce a compensation signal. The compensation signal is applied in feedback to one of the first and second stress signals to compensate for variations induced in said one of the first and second stress signals by stresses in the semiconductor substrate.Type: ApplicationFiled: February 21, 2017Publication date: January 25, 2018Applicant: STMicroelectronics S.r.l.Inventor: Giuseppe Scilla
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Patent number: 9153578Abstract: A trimming circuit is configured to carry out a trimming operation on a device portion of an integrated circuit device. The trimming circuit includes: shunt fuses wherein each shunt fuse is coupled in parallel to a trimming resistance, further resistances wherein each further resistance is coupled in parallel to a respective shunt fuse. The circuit is configured to allow the flow of the trimming current when the respective shunt fuse is burnt during the trimming operation.Type: GrantFiled: January 13, 2014Date of Patent: October 6, 2015Assignee: STMicroelectronics S.r.l.Inventor: Giuseppe Scilla
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Patent number: 9099516Abstract: A power bipolar structure is described having at least one first, one second and one third terminal and including at least one power bipolar transistor having a finger structure coupled to at least one driving block. The power bipolar transistor includes at least one elemental bipolar cell connected to these first, second and third terminals and including at least one power elemental bipolar structure corresponding to a finger of the power bipolar transistor, electrically coupled between the first and second terminals and coupled to a driving section of the driving block by at least one sensing section able to detect information on the operation of the power elemental bipolar structure, the sensing section being in turn coupled to a control circuit and supplying it with a current value as a function of the local temperature of the power elemental bipolar structure.Type: GrantFiled: December 13, 2012Date of Patent: August 4, 2015Assignee: STMicroelectronics S.r.lInventor: Giuseppe Scilla
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Publication number: 20140197517Abstract: A trimming circuit is configured to carry out a trimming operation on a device portion of an integrated circuit device. The trimming circuit includes: shunt fuses wherein each shunt fuse is coupled in parallel to a trimming resistance, further resistances wherein each further resistance is coupled in parallel to a respective shunt fuse. The circuit is configured to allow the flow of the trimming current when the respective shunt fuse is burnt during the trimming operation.Type: ApplicationFiled: January 13, 2014Publication date: July 17, 2014Applicant: STMICROELECTRONICS S.R.L.Inventor: Giuseppe Scilla
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Patent number: 8665006Abstract: The trimming circuit includes a plurality of trimmable resistances that may be coupled among them, each resistance being connected in parallel to a respective fuse. The trimming circuit allows burning any number of fuses according to a fixed trimming sequence using only one or two dedicated pins because it includes an input diode-connected transistor and a plurality of trimming transistors of different sectional area, each connected to force current throughout a respective one of the shunt fuses and coupled to the input diode-connected transistor such to mirror the current flowing therethrough. The fuses of the trimming circuit may be burnt by applying a trimming voltage to the diode-connected input transistor with a voltage generator connected between a dedicated pin of the circuit and a terminal at a reference potential, such to force a current therethrough as long as the mirrored currents flowing throughout the fuses burn them.Type: GrantFiled: May 10, 2012Date of Patent: March 4, 2014Assignee: STMicroelectronics S.R.L.Inventors: Giuseppe Scilla, Francesco DiStefano
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Patent number: 8525579Abstract: An electronic trimming circuit carries out a trimming operation on portions of an integrated device. The circuit includes N trimmable interconnected resistances, each connected in parallel to a respective shunt fuse. N trimming transistors are each connected to a respective one of the shunt fuses to force therethrough substantially the whole current flowing in the respective trimming transistor. N bias networks are each functionally connected to a control terminal of a respective one of the trimming transistors to directly bias an active junction thereof. An externally driven heating device is thermally coupled with the active junctions of the trimming transistors adapted to raise the temperature thereof.Type: GrantFiled: May 14, 2012Date of Patent: September 3, 2013Assignee: STMicroelectronics S.r.l.Inventors: Giuseppe Scilla, Francesco Distefano
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Publication number: 20120293241Abstract: An electronic trimming circuit carries out a trimming operation on portions of an integrated device. The circuit includes N trimmable interconnected resistances, each connected in parallel to a respective shunt fuse. N trimming transistors are each connected to a respective one of the shunt fuses to force therethrough substantially the whole current flowing in the respective trimming transistor. N bias networks are each functionally connected to a control terminal of a respective one of the trimming transistors to directly bias an active junction thereof. An externally driven heating device is thermally coupled with the active junctions of the trimming transistors adapted to raise the temperature thereof.Type: ApplicationFiled: May 14, 2012Publication date: November 22, 2012Applicant: STMicroelectronics S.r.l.Inventors: Giuseppe SCILLA, Francesco Distefano
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Publication number: 20120286848Abstract: The trimming circuit includes a plurality of trimmable resistances that may be coupled among them, each resistance being connected in parallel to a respective fuse. The trimming circuit allows burning any number of fuses according to a fixed trimming sequence using only one or two dedicated pins because it includes an input diode-connected transistor and a plurality of trimming transistors of different sectional area, each connected to force current throughout a respective one of the shunt fuses and coupled to the input diode-connected transistor such to mirror the current flowing therethrough. The fuses of the trimming circuit may be burnt by applying a trimming voltage to the diode-connected input transistor with a voltage generator connected between a dedicated pin of the circuit and a terminal at a reference potential, such to force a current therethrough as long as the mirrored currents flowing throughout the fuses burn them.Type: ApplicationFiled: May 10, 2012Publication date: November 15, 2012Applicant: STMicroelectronics S.r.I.Inventors: Giuseppe SCILLA, Francesco Distefano
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Patent number: 6703841Abstract: A method is provided for detecting a discontinuity in electrical connections of a microchip that includes an input pin connected to a voltage supply line, multiple circuit sections, an output voltage line for connecting the circuit sections to an output pin, and a resistive output divider. According to the method, there is determined a number of electrical connections as a function of the short circuit current for the input and output pins. The voltage supply line is sectioned as a function of the number of electrical connections determined for the input pin, and the sections of the voltage supply line are connected independently to the circuit sections. The output voltage line is sectioned as a function of the number of electrical connections determined for the output pin. As a function of the number of electrical connections determined, the number and value of the resistances of the output divider is increased.Type: GrantFiled: May 22, 2002Date of Patent: March 9, 2004Assignee: STMicroelectronics S.r.l.Inventor: Giuseppe Scilla
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Publication number: 20030176108Abstract: A method is provided for detecting a discontinuity in electrical connections of a microchip that includes an input pin connected to a voltage supply line, multiple circuit sections, an output voltage line for connecting the circuit sections to an output pin, and a resistive output divider. According to the method, there is determined a number of electrical connections as a function of the short circuit current for the input and output pins. The voltage supply line is sectioned as a function of the number of electrical connections determined for the input pin, and the sections of the voltage supply line are connected independently to the circuit sections. The output voltage line is sectioned as a function of the number of electrical connections determined for the output pin. As a function of the number of electrical connections determined, the number and value of the resistances of the output divider is increased.Type: ApplicationFiled: May 22, 2002Publication date: September 18, 2003Applicant: STMICROELECTRONICS S.r.l.Inventor: Giuseppe Scilla
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Patent number: 6266221Abstract: A process-independent thermal protection circuit for microelectronic circuits is disclosed, including a thermal ramp generator suitable to generate a first thermal ramp signal and a second thermal ramp signal, a differentiator suitable to determine the difference between the first and second thermal ramp signals in order to generate a difference voltage signal, and a comparator suitable to compare the difference voltage signal with a reference voltage signal in order to assert a thermal protection signal when the difference voltage signal drops below the reference voltage signal.Type: GrantFiled: October 28, 1999Date of Patent: July 24, 2001Assignee: STMicroelectronics S.r.l.Inventor: Giuseppe Scilla
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Patent number: 5880628Abstract: A voltage booster circuit including a pull-up capacitor connected to the supply line via a PMOS switching transistor. The other terminal of the pull-up capacitor is supplied with a pull-up voltage switching between a first value determining charging of the capacitor, and a second value higher than the first and determining pull-up of the capacitor. A negative voltage source presents an output connected to the control terminal of a switch transistor, and generates a negative voltage of a value lower than the first pull-up voltage value when charging the capacitor, so as to saturate the switch transistor and charge the capacitor to a voltage close to the supply voltage.Type: GrantFiled: January 14, 1997Date of Patent: March 9, 1999Assignee: Consorzio per la Ricerca sulla Microelettronica nel MezzogiornoInventors: Marcello Criscione, Giuseppe Scilla
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Circuit for the protection against overcurrents in power electronic devices and corresponding method
Patent number: 5764460Abstract: A circuit for protecting from overload currents includes an electronic power device having at least first and second terminals and at least one control terminal. The circuit also includes at least one voltage-generating circuit for generating a reference voltage having a predetermined pattern. The voltage-generating circuit includes at least a first terminal connected to the first terminal of the power device and at least a second terminal coupled to the second terminal of the power device through a sensor. The circuit also preferably includes at least one comparator for comparing the reference voltage with a voltage present across the sensor. The comparator has at least one output terminal and at least first and second input terminals. The first and second input terminals are respectively connected to a third terminal of the voltage-generating circuit and the second terminal of the power device.Type: GrantFiled: December 23, 1996Date of Patent: June 9, 1998Assignee: Co.Ri.M.Me-Consorzio per la Ricerca sulla Microelettronica nel MezzogiornoInventors: Leonardo Perillo, Giuseppe Scilla -
Patent number: 5714905Abstract: A method, and associated circuit, which can prevent the latch-down phenomenon in transistors which are protected from going out of their SOAs.By supplementing the first protection circuit (against moving out of the SOA) with a second protection circuit which can drive the control terminal of the transistor such that when, upon the voltage across the main conduction path of the transistor being increased, the value of the current flowing through said path would tend, due to the first protection, to drop below a predetermined lower limit, that value can be kept approximately constant and unaffected by the load as seen from the output terminal of the transistor; the transistor will at all events supply the load with some current up to the acceptable limit VMAX by the transistor.Type: GrantFiled: October 27, 1995Date of Patent: February 3, 1998Assignee: Consorzio per la Ricerca sulla Microelettronica nel MezzogiornoInventors: Giovanni Galli, Giuseppe Scilla
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Patent number: 5177659Abstract: The device for protection against the short circuit of an MOS-type power device comprises at least one secondary branch cirucit arranged in parallel with a main branch circuit which includes the power transistor. The secondary branch includes a control MOS transistor having the same characteristics as the power transistor under control and the ability to conduct a current equal to a fraction of that flowing through the power transistor. The gate of the control transistor is connected directly with that of the power transistor. The secondary branch also includes means sensitive to temperature which, in the case of a current flow corresponding to the short circuit current of the power transistor, act on the gate common to the control and to the power transistors so as to lower its voltage and thus limit the conduction of same.Type: GrantFiled: October 30, 1990Date of Patent: January 5, 1993Assignee: SGC-Thomson Microelectronics S.R.L.Inventors: Michele Zisa, Giuseppe Scilla, Sergio Palara