Patents by Inventor Glen Alan Jaquette

Glen Alan Jaquette has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6239939
    Abstract: A detector and method for detecting data modulated into a timing based servo pattern prerecorded on a media, comprising shifts of pairs of non-parallel transition stripes arranged in a frame of two bursts. Timing intervals between sequential transition stripes are detected. Interval comparison logic compares selected timing intervals and indicates whether the compared intervals represent a “0”, or a “1”. First and second counters respectively increment the number of the compared intervals representing a “0” and representing a “1” in each frame. Bit comparison logic compares, for each frame, the incremented numbers representing a “0” and a “1” to a predetermined criteria and, upon one of the numbers meeting the criteria, identifies the corresponding “0” or “1” as the bit value for the frame. The bits are data comprising longitudinal position words arranged in a linear sequence.
    Type: Grant
    Filed: August 9, 1999
    Date of Patent: May 29, 2001
    Assignee: International Business Machines Corporation
    Inventors: Nhan Xuan Bui, Junichi Fukuda, Glen Alan Jaquette, John Alexander Koski, Kazuhiro Tsuruta
  • Patent number: 6218970
    Abstract: A method and system for handling literals in a Lempel-Ziv data compression system. The literals are arranged in a storage array in an MRU/LRU format in a defined sequential MRU/LRU order, with shorter MRU/LRU reference codes assigned to the MRU literals and longer MRU/LRU reference codes to the LRU literals. Upon receiving an input literal, a selector selects the literal and a reference encoder provides the assigned MRU/LRU reference code for the literal as the output. The literals are then rearranged. An incrementor responds to the literal selection, by incrementing downward one location in the sequential order, all the literals in the storage array from the top of the MRU order to the one of the literals in the order immediately preceding the selected literal, and the selector moves the selected literal to the top of the MRU order.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: April 17, 2001
    Assignee: International Business Machines Corporation
    Inventor: Glen Alan Jaquette
  • Patent number: 6118745
    Abstract: Disclosed is a digital edge processor frequency control for estimating the center frequency of a recorded signal having a known format, such as data recorded on a CLV optical disk or on magnetic tape. The read channel includes a sampling detector which samples the recorded signal at a known rate to provide edge position signals (PAT) indicating the location of recorded pulse edges. An edge pattern identifier detects whether the edge signals of the recording signal match a predetermined element of the known format. Examples of predetermined elements include a pulse of a known length and whose edges are spaced a known distance, a predetermined pulse pattern, or a pulse or pattern at a known location. An interval counter is coupled to the pattern identifier for measuring the interval length between the edges of the matching pulse or pattern in units of the sample length.
    Type: Grant
    Filed: January 26, 1998
    Date of Patent: September 12, 2000
    Assignee: International Business Machines Corporation
    Inventors: Robert Allen Hutchins, Glen Alan Jaquette, Kazuhiro Tsuruta
  • Patent number: 6009547
    Abstract: Disclosed is a memory array system, such as a DRAM, for the temporary storage of data. ECC check symbols for insuring the correctness of the data are written to a different segment of the memory array from the data. The data is formatted into blocks of length (l), directly related to the standard sized access width of the memory array, and gap blocks of length (l) are inserted into the data stream for subsequent substitution of headers. The data and associated headers may have appended check symbols calculated with a Reed-Solomon generator polynomial. The data blocks are written into memory partitions with an exact alignment of blocks with partition boundaries, so that no gap block spans a partition boundary. ECC encoding logic calculates the ECC check symbols, employing an identical Reed-Solomon generator polynomial for each partition. The headers with the associated CRC are subsequently substituted for the gap blocks.
    Type: Grant
    Filed: December 3, 1997
    Date of Patent: December 28, 1999
    Assignee: International Business Machines Corporation
    Inventors: Glen Alan Jaquette, Gordon Leon Washburn
  • Patent number: 6008743
    Abstract: Disclosed are a method and apparatus for switching between lossless data compression modes, and the switching indicated by at least one multibit mode switch character. The binary format input data is received and a FIFO determination of the compression efficiency of the input data under each mode is made on an ongoing basis. The ongoing basis may be for each compressed code word or more. A FIFO comparison of the compression efficiencies under each mode are made, and the modes for compressing the input data are switched only upon the comparison, or accumulated comparisons, indicating the compression efficiency of the present mode is less than the compression efficiency of the other mode by a threshold value, the threshold value directly related to the number of bits in the multibit mode switch character.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: December 28, 1999
    Assignee: International Business Machines Corporation
    Inventor: Glen Alan Jaquette
  • Patent number: 5999110
    Abstract: Disclosed is an error tolerant binary encoded synchronization mark concatenated with a known pattern, such as a VFO pattern, comprising an encoded pattern of a fixed plurality of bits, the encoded synchronization pattern being at maximum Hamming distance from the concatenated known pattern for the number of bits in the fixed plurality of bits. The error tolerant synchronization mark may also be concatenated with the VFO pattern seen in reverse, and the synchronization pattern additionally is at maximum Hamming distance from the concatenated known VFO pattern seen in reverse.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: December 7, 1999
    Assignee: International Business Machines Corporation
    Inventors: Mario Blaum, Steven Robert Hetzler, Glen Alan Jaquette, William John Kabelac
  • Patent number: 5978335
    Abstract: An integrated calibration apparatus operates in multiple calibration modes of a multi-mode information storage system such as an optical disk drive to calibrate the drive in the multiple write modes. An event processing and measurement circuit is configurable in multiple configurations that each correspond to a different calibration measurement. Each configuration concurrently measures one or more parameters of readback data written to an optical disk by the optical disk drive operating in a particular write mode. A qualification circuit selects valid measurements for two different parameters or for two different qualification of the same parameter. A summation circuit sums valid measurements of each parameter measured and counts the number of measurements summed for each parameter. The calibration apparatus calculates average values for the measured parameters from the sums and counts, and then calibrates the multi-mode optical disk drive for its current write mode based on the average values.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: November 2, 1999
    Inventors: Alan Robert Clark, Robert Allen Hutchins, Glen Alan Jaquette
  • Patent number: 5968149
    Abstract: An input/output (I/O) data compression system operates two data compression modules in tandem. A "master" module has an uncompressed data I/O, a data compressor/decompressor, a data flow manager, and a compressed data I/O. An identical "dual" data compression module is also provided. Either module is capable of operating singly to provide compression/decompression between the data I/Os. A "tandem" control causes the master data flow manager to control the compressed data I/O, and causes the dual data flow manager to relinquish control. A dual port "active/slave" control responds to receipt of an input at one of the uncompressed data I/O's, idling the uncompressed data I/O of the module (slave) not receiving the input, and causing the module (active) receiving the input to conduct the input and output of uncompressed data.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: October 19, 1999
    Assignee: International Business Machines Corporation
    Inventors: Glen Alan Jaquette, Gordon Leon Washburn
  • Patent number: 5969649
    Abstract: Disclosed are robust Resync patterns for insertion into a run length limited (d,k) encoded channel bit stream, which Resync pattern may be recovered from the RLL (d,k) encoded bit stream without being confused with data. The Resync pattern includes at least one string of consecutive "0"s which exceeds the RLL (k) constraint, and is inserted into the channel bit stream RLL data codewords. The RLL code excludes certain patterns representing a bit shift from the Resync pattern of one or both "1" bits adjacent to the string of "0" bits, shifted to shorten the Resync pattern to within the (k) constraint. Additionally, the Resync pattern may have two different aspects, one of which is the string of "0"s violating the constraints of the RLL code, and another which is specifically excluded from the RLL code, such as an excluded concatenated sequence of a VFO bit pattern of predetermined length or greater.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: October 19, 1999
    Assignee: International Business Machines Corporation
    Inventors: Jonathan James Ashley, Glen Alan Jaquette, Brian Harry Marcus, Paul Joseph Seger
  • Patent number: 5930065
    Abstract: Disclosed is a magnetic tape media having addressing data information superimposed on prerecorded track following servo information. The servo information is recorded in magnetic flux transition patterns defining at least one longitudinal servo track. A servo burst pattern of at least two repeated pairs of non-parallel magnetic flux transitions is provided, at least one of which transitions is slanted or otherwise continuously longitudinally variable across the width of the servo track. At least two transitions of the repeated pairs are shifted longitudinally with respect to other of the transitions, the shifted transitions comprising the superimposed addressing data information.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: July 27, 1999
    Assignee: International Business Machines Corporation
    Inventors: Thomas Robert Albrecht, Robert Carl Barrett, James Howard Eaton, Robert Allen Hutchins, Glen Alan Jaquette
  • Patent number: 5923272
    Abstract: Disclosed is a coding technique which takes advantage of the use of an internal synchronization technique for a timing-based servo which employs alternating 4 and 5 transition bursts of servo to provide a simplified synchronization of the data, and comprises a coding technique which employs a periodic pattern of bursts each period comprising two bursts of 5 transitions followed by two bursts of 4 transitions. The code provides, in each burst of 5 transitions, two defined positions for the 2nd and 4th transitions, spaced from equally spaced positions in the burst, to represent each of two bit values. The code provides, in each burst of 4 transitions, two defined positions for the 2nd and 3rd transitions, spaced from equally spaced positions in the burst, to represent each of two bit values.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: July 13, 1999
    Assignee: International Business Machines Corporation
    Inventors: Thomas Robert Albrecht, Glen Alan Jaquette
  • Patent number: 5825744
    Abstract: In a first embodiment, a read detection channel includes a tracking threshold circuit for generating a variable threshold signal and a detection circuit, which is configurable in a number of diverse configurations that each correspond to one of the multiple diverse data formats. In addition, the first embodiment of the read detection channel includes a configuration circuit that automatically selects one of the configurations of the data detection circuit in response to a detection of a format of the input data stream. The first embodiment of the read detection channel permits data bits encoded in multiple diverse data formats to be decoded utilizing a single configurable read detection channel. In a second embodiment, the configurable read detection channel includes a tracking threshold circuit that can be configured to generate a threshold output signal in response to an input signal or in response to the input signal and a phase error signal.
    Type: Grant
    Filed: May 13, 1996
    Date of Patent: October 20, 1998
    Assignee: International Business Machines Corporation
    Inventors: Robert Allen Hutchins, Glen Alan Jaquette, Alan Robert Clark
  • Patent number: 5790491
    Abstract: A write-once read-many (WORM) optical disk recorder automatically calibrates its laser to emit a laser beam of a desired power level. While writing data to the WORM disk, a laser test signal is written to a laser checking area termed Automatic Laser Power Correction (ALPC) field. If the emitted laser test signal has a power level outside an acceptable power level window, then inappropriate laser power is indicated. Then, in an error recovery procedure (ERP) the laser power is calibrated in the data sector to be written to using short spaced-apart laser test signals. After successful calibration, data are written to the sector. The test signals appear as burst errors that can be corrected by a suitable error correction code. If such calibration is not successful then a write calibrate sector, WCS, is created and used for an extensive automatic calibration. In the WCS both laser power level is calibrated. The calibration result information is written to WCS for later use.
    Type: Grant
    Filed: April 8, 1996
    Date of Patent: August 4, 1998
    Assignee: International Business Machines Corporation
    Inventors: Glen Alan Jaquette, Arturo Avila Mojica
  • Patent number: 5737371
    Abstract: An apparatus and method are provided for detecting and correcting data stream misalignments during read back of data in an optical drive unit. In a dual PLL system, after a data stream is divided into separate positive and negative data streams, correlations are made between the transitions in the even nibbles of a sync mark and the transitions in the odd nibbles. Proper and improper alignments can be detected. The resync marks are also employed to determine whether the two data streams are misaligned and, if they are, by how much. While the position of an alignment bit within a resync mark can be detected, realigning the data streams based upon this position can result in small defects causing false alignment and a continuous error until the next resync. Consequently, the present invention employs other bits in the resync mark and in the adjoining customer data field to validate the misalignment independent of the alignment bit itself.
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: April 7, 1998
    Assignee: International Business Machines Corporation
    Inventor: Glen Alan Jaquette
  • Patent number: 5680383
    Abstract: In a pulse width modulated read signal channel for an optical disk drive, a data-transition threshold is maintained for data detection by a threshold tracking circuit that estimates the amplitude centerline data-transition threshold from the most recent maximum and minimum values of the read signal waveform. To improve the accuracy of the response of the centerline estimator, the threshold is increased or decreased based on the phase error at each read signal transition through the data-transition threshold. In addition, defects in the optical recording media are detected, and a defect present signal is used to inhibit the transition phase error input to the centerline estimator. This prevents the estimator from moving the threshold to an incorrect stable level. In addition, the defect present signal boosts the error feedback in the centerline estimator. The estimator then more quickly follows the read signal waveform.
    Type: Grant
    Filed: October 2, 1996
    Date of Patent: October 21, 1997
    Assignee: International Business Machines Corporation
    Inventors: Alan Robert Clark, Robert Allen Hutchins, Glen Alan Jaquette, Ara Sarkis Patapoutian, Pantas Sutardja
  • Patent number: 5640381
    Abstract: An optical disk recorder employs laser drive signals having diverse current or power levels. A scaling digital-analog-converter (DAC) supplies a scaled reference signal to a plurality of scaled DACs. The scaled DACs supply the diverse laser drive signals. Calibrating the scaling DAC calibrates the scaled DACs. A base array of DACs include not only the scaling DAC but a plurality of base array DACs. Such base array DACs control reading operations as well as supplying a threshold current. The threshold current is that laser drive signal current level below which laser 25 does not emit a laser beam. During writing, the CUT current is added to the laser drive currents supplied by the scaled DACs. A desired CUT current is determined by calculating a slope of the laser drive current to emission of radiation. Then the slope is extrapolated to a zero emission point below which no coherent emission of radiation occurs.
    Type: Grant
    Filed: March 8, 1996
    Date of Patent: June 17, 1997
    Assignee: International Business Machines Corporation
    Inventors: David Ernest Call, Stephen J. Hrinya, Jerry Elden Hurst, Jr., Glen Alan Jaquette, Anthony Juliana, Jr.