Abstract: A computer is provided as an add-on processor for attachment to a host computer. Included are a single data bus, a 32-bit arithmetic logic unit, a data stack, a return stack, a main program memory, data registers, program memory addressing logic, micro-program memory, and a micro-instruction register. Each machine instruction contains an opcode as well as a next address field and subroutine call/return or unconditional branching information. The return address stack, memory addressing logic, program memory, and microcoded control logic are separated from the data bus to provide simultaneous data operations with program control flow processing and instruction fetching and decoding. Subroutine calls, subroutine returns, and unconditional branches are processed with a zero execution time cost. Program memory may be written as either bytes or full words without read/modify/write operations.

Abstract: A computer is provided as an add-on board for attachment to a host computer. Included are a single data bus, a 16-bit arithmetic logic unit, a data stack, a return stack, a main program memory, data registers, program counters, microprocessor memory, and microinstruction register. Each stack has a pointer which may be set without altering the contents of the respective stacks. The main program memory has a direct connection to the writable microprogram memory for providing instruction. MVP-FORTH is used for programming a microcode assembler, a cross-compiler, a set of diagnostic programs, and microcode.