Abstract: An integrated circuit includes, in accordance with an embodiment of the present invention, a data port, a system bus for transferring information to and from the data port, and a plurality of SERDES channels. A plurality of registers associated with the plurality of SERDES channels may be written to via the system bus on an individual, group, or global basis to provide communication settings for the SERDES channels.

Abstract: An apparatus and a scheme for adapting a plurality of tap weights in an FIR filter wherein tap weights are adapted for a current data cycle utilizing a current subset of data and the tap weights are adapted for a next data cycle utilizing a next subset of data is described. A method of adapting the plurality of tap weights in an adaptive FIR filter comprises assigning a current time slot for a timeshared tap weight processor during a current data cycle and assigning a different time slot for the timeshared tap weight processor during a next data cycle. The tap weights are adapted for the current data cycle utilizing a current subset of data and the tap weights are adapted for the next data cycle utilizing a next subset of data. In a further enhancement of the present invention method the different time slot for the next data cycle is assigned by rotating time slot assignments for the timeshared tap weight processor.