Patents by Inventor Glen Slade

Glen Slade has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220001202
    Abstract: Apparatus for shielding a non-human animal from a sterilizant. The apparatus (100, 200) defines a space (102, 202) for accommodating a non-human animal (111, 204) and a shield (107, 201) for shielding a part of the animal from a sterilizant such as radiation. Only exposing a specific part of the animal to sterilizant produces a sterile animal which is better adapted to mate with other animals When the sterilized animals are released in a sterile insect technique, the technique is more efficient because the released animals are better adapted to mate with a wild population.
    Type: Application
    Filed: November 22, 2019
    Publication date: January 6, 2022
    Inventor: Glen SLADE
  • Publication number: 20200260685
    Abstract: Apparatus which comprises a plurality of containers (2) for holding animals (1, 4), wherein the conditions in each container are isolated from the conditions in other containers. The apparatus is provided with a measurement device (3, 10) for taking a measurement related to a first container or an animal associated with the first container. An actuator (5, 11) is also provided to perform an action on the first container, its environment or on an animal associated with the first container. The apparatus is particularly useful for providing an improved animal population and rearing process. It is particularly useful for rearing insects.
    Type: Application
    Filed: May 6, 2020
    Publication date: August 20, 2020
    Inventor: Glen Slade
  • Publication number: 20070186287
    Abstract: A method of storing a data set on a storage device carrying a file of random data comprising the steps of: selecting, in dependence on a user input passphrase, a first location within the file of random data for storing a file index (FI); selecting a second location within the file of random data for storing the data set; encrypting the data set (D); storing the encrypted data set at the second selected location in the file of random data; making an entry in the file index in respect of the data set, the entry comprising an indication of the second selected location; encrypting the file index; and storing the encrypted file index at the first selected location in the file of random data. Also computer programs for carrying out such methods and storage devices arranged to operate using such methods.
    Type: Application
    Filed: January 28, 2005
    Publication date: August 9, 2007
    Inventor: Glen Slade
  • Patent number: 6804810
    Abstract: A method of designing a VLSI chip and a chip designed according to the method are described. The method includes the steps of early consideration of resistive and capacitive values during a VLSI chip design process. The method provides for estimation of signal routes between nodes of functional blocks to be incorporated in the chips. The estimation may be based on a floor plan describing the positioning of the functional blocks, a connectivity description identifying connections between ports of the blocks and physical and mechanical configuration parameters. The functional blocks and design of the layout may be hierarchical in nature. The signal route estimation may be based on control factors such as the specification of signal route establishment algorithms. The next step is to foliate the nodes followed by determining resistance and capacitance values corresponding to all or parts of the estimated signal routes.
    Type: Grant
    Filed: February 21, 2000
    Date of Patent: October 12, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Rex Mark Petersen, John D Wanek, Jeremy Glen Slade
  • Patent number: 6609242
    Abstract: A VLSI circuit having regular, tiled arrays of cells is designed using a method and an apparatus to allow automatic creation of the artwork needed to distribute power from a top-level power grid (i.e., lines VDD and GND) to power rails in lower-level metal layers of cells. That is, the cell arrays may include power rails that need to be connected to a top-level power grid. The method and apparatus may be used in conjunction with software tools used to create other elements of the VLSI design. The method and apparatus automate the task of connecting each of the cells in the array to the power lines.
    Type: Grant
    Filed: July 20, 2001
    Date of Patent: August 19, 2003
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Jeremy Glen Slade