Abstract: A multiple-channel protection device and associated methods thereof. The device includes a first lead having a first chip attachment portion and a second chip attachment portion, a second lead having a third chip attachment portion, and a third lead having a fourth chip attachment portion. A first semiconductor chip is configured to be conductively coupled to the first chip attachment portion and the third chip attachment portion. A second semiconductor chip is configured to be conductively coupled to the second chip attachment portion and the fourth chip attachment portion.

Abstract: A TVS device may include a substrate, comprising a polarity of a first type, a first dopant layer, disposed on a first main surface of the substrate, and comprising a polarity of a second type, wherein the first dopant layer forms a P/N junction with the substrate. The TVS device may further include a second dopant layer, disposed on a second main surface of the substrate, opposite the first main surface, the second layer comprising the polarity of the first type, and a patterned layer, disposed on the second main surface of the substrate, the patterned layer comprising the polarity of the second type, wherein the patterned layer is interspersed with the second layer.

Abstract: An overvoltage protection device may include an n-type semiconductor substrate, a p-type layer disposed atop the n-type semiconductor substrate, and a passivation region formed in the n-type semiconductor substrate and the p-type layer, wherein the passivation region comprises a semi-insulating polycrystalline silicon (SIPOS) layer.

Abstract: Provided herein are package structures including a first lead frame having a first pedestal and a first lead extending from the first pedestal. A first perimeter ridge defines a first recessed area in a first main side of the first pedestal, wherein a die pad is positioned within the first recessed area. The package structure may further include a chip layer having a first main side opposite a second main side, wherein the second main side is in abutment with the first perimeter ridge of the pedestal of the first lead frame. The package structure may further include a clip including a second pedestal and a lead connector extending from the second pedestal, wherein a second perimeter ridge defines a second recessed area in a second main side of the second pedestal, and wherein the second perimeter ridge is in abutment with the first main side of the chip layer.