Patents by Inventor Glenn E. Gribble

Glenn E. Gribble has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140257917
    Abstract: According to one embodiment, a system includes a processor and an interface. The processor determines an entity, a plurality of process groupings associated with the entity, a plurality of processes associated with the entity, a plurality of risks associated with the entity, and a plurality of controls associated with the entity. For each of the controls, the processor calculates one or more weighted control scores for the control. For each of the risks, the processor calculates an inherent risk score for the risk and a residual risk score for the risk. For each of the processes, the processor calculates a residual risk score for the process. The interface communicates for display, for each of the process groupings, an image representing the process grouping. The interface further communicates for display, for each of the processes, an image representing the process and an indication of the residual risk score for the process.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: Bank of America Corporation
    Inventors: Frederick Spencer, Kashyap P. Bhatia, Glenn E. Gribble, Sabine Jerome-Paillant, Peter Macchio
  • Publication number: 20140257918
    Abstract: According to one embodiment, a system includes a processor and an interface. The processor determines a plurality of processes associated with an entity, a plurality of risks associated with the entity, and a plurality of controls associated with the entity. For each of the controls, the processor calculates one or more weighted control scores for the control. For each of the risks, the processor calculates an inherent risk score and a residual risk score. For each of the processes, the processor calculates a residual risk score for the process and determines a process weight associated with the process. The processor further calculates a residual risk score for the entity based on each of the residual risk scores of the processes and each of the process weights associated with the processes. The interface communicates for display an indication of the residual risk score for the entity.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: Bank of America Corporation
    Inventors: Frederick Spencer, Kashyap P. Bhatia, Glenn E. Gribble, Sabine Jerome-Paillant, Peter Macchio
  • Patent number: 5165054
    Abstract: A linear voltage-to-current converter (LVCC) circuit includes two transistors, one P-channel and one N-channel. The input voltage is applied to the gates of both transistors. The drains of the two transistors are connected. The source of the p-type transistor is connected to a first voltage rail, and the source of the N-channel is connected to a second voltage rail of lower voltage. The output is the difference between the current through the P-channel transistor and the N-channel transistor. A linear current-to-voltage converter (LCVC) circuit is similar to the LVCC circuit, except that the gates of the transistors are tied to the drains of the transistors. The input current is supplied to the drains, and the output voltage is the voltage of the drains.
    Type: Grant
    Filed: December 18, 1990
    Date of Patent: November 17, 1992
    Assignee: Synaptics, Incorporated
    Inventors: John C. Platt, Michael F. Wall, Glenn E. Gribble, Carver A. Mead
  • Patent number: 5126685
    Abstract: A linear voltage-to-current converter (LVCC) circuit includes two transistors, one P-channel and one N-channel. The input voltage is applied to the gates of both transistors. The drains of the two transistors are connected. The source of the p-type transistor is connected to a first voltage rail, and the source of the N-channel is connected to a second voltage rail of lower voltage. The output is the difference between the current through the P-channel transistor and the N-channel transistor. A linear current-to-voltage converter (LCVC) circuit is similar to the LVCC circuit, except that the gates of the transistors are tied to the drains of the transistors. The input current is supplied to the drains, and the output voltage is the voltage of the drains.
    Type: Grant
    Filed: August 19, 1991
    Date of Patent: June 30, 1992
    Assignee: Synaptics, Incorporated
    Inventors: John C. Platt, Michael F. Wall, Glenn E. Gribble, Carver A. Mead
  • Patent number: 5107149
    Abstract: A linear voltage-to-current converter (LVCC) circuit includes two transistors, one P-channel and one N-channel. The input voltage is applied to the gates of both transistors. The drains of the two transistors are connected. The source of the p-type transistor is connected to a first voltage rail, and the source of the N-channel is connected to a second voltage rail of lower voltage. The output is the difference between the current through the P-channel transistor and the N-channel transistor. A linear current-to-voltage converter (LCVC) circuit is similar to the LVCC circuit, except that the gates of the transistors are tied to the drains of the transistors. The input current is supplied to the drains, and the output voltage is the voltage of the drains.
    Type: Grant
    Filed: August 19, 1991
    Date of Patent: April 21, 1992
    Assignee: Synaptics, Inc.
    Inventors: John C. Platt, Michael F. Wall, Glenn E. Gribble, Carver A. Mead