Patents by Inventor Glenn Narvaez

Glenn Narvaez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Chip scale and land grid array semiconductor packages
    Patent number: 6551859
    Abstract: Techniques for improving the manufacture and structure of leadframe chip scale packages and land grid array packages are described. One aspect of the invention pertains to a method for patterning a conductive substrate, which is utilized to form a packaged semiconductor device, wherein a metallic barrier layer and a second metallic layer are utilized as an etching resist. A method, according to another aspect of the invention pertains to covering a metallic barrier layer and second metallic layer with a etch resistant cap such that the etch resistant cap is used as a etching resist. In another aspect of the present invention, a method for treating a conductive leadframe with a CZ treatment is disclosed. In yet another aspect of the present invention, techniques relating to locking grooves within the studs of a studded leadframe are disclosed.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: April 22, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Shaw Wei Lee, Thanh Lequang, Wayne W. Lee, Glenn Narvaez, William Jeffery Schaefer