Abstract: In a Local Area Network (LAN) system, an Ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency.

Abstract: Black video segments in a video playlist may be minimized. Black detection may be utilized by a network device to identify true starting point and a true ending point of a video asset which includes black video segments in the playlist. Locations associated with the true starting and ending points may be recorded in metadata associated with the video asset. New black video segments may be added at the beginning and at the end of the playlist. Playback of the playlist may then be initiated to play the video asset only between the recorded location associated with the true starting point and the recorded location associated with the true ending point at the network device thereby minimizing the black video segments in the video asset.

Abstract: In a Local Area Network (LAN) system, an ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency.

Abstract: In a Local Area Network (LAN) system, an Ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency.

Abstract: Black video segments in a video playlist may be minimized. Black detection may be utilized by a network device to identify true starting point and a true ending point of a video asset which includes black video segments in the playlist. Locations associated with the true starting and ending points may be recorded in metadata associated with the video asset. New black video segments may be added at the beginning and at the end of the playlist. Playback of the playlist may then be initiated to play the video asset only between the recorded location associated with the true starting point and the recorded location associated with the true ending point at the network device thereby minimizing the black video segments in the video asset.

Abstract: A system for operating a network interface adapter when an associated network computing system is in a low-power state. The system includes a host executing an operating system (OS) and having a host OS absent state while operating in the low-power state and a host OS present state while operating in a full-power state. When a message is received at the network interface adapter, the network adapter determines whether the host is in the OS present state or the OS absent state. The network adapter forwards the message to the host if it is in the OS present state, and determines the message type if the host is in the OS absent state. The network adapter may generate and transmit a response to the message based on the message type without unnecessarily transitioning the host to the OS present state.

Abstract: A security feature is added to the Wake On LAN packet protocol, and an extensible mechanism is provided allowing for other commands and options to be specified within the Wake On LAN packet. The protocol allows for signaling power management circuits in a host computer in response to messages received through a network interface. Logic coupled to the network interface detects a received network packet carrying a message from a source to the management circuits in the host computer. The logic includes security logic that is responsive to data in the packet to authenticate the source of the message, to accept the message and generate a signal to the management circuit in the host computer when the message passes authentication, and to discard the message when the message fails authentication.

Abstract: A network adapter is provided that controls the transfer of data between a host computer and a network medium in a manner which optimizes the amount of data transferred between the host computer and the buffer of the network adapter during a contemporaneous transfer of data between the network medium and the buffer. The network adapter optimizes the data transfer by dynamically determining when to make a bus request such that the buffer is capable of transferring a data packet of a particular target burst size at the end of an estimated latency period. The network adapter includes a buffer memory that transfers data between the host computer and the network medium and a buffer control logic that generates a first buffer data signal in response to the amount of data in the buffer memory.

Abstract: A security feature is added to the Wake On LAN packet protocol, and an extensible mechanism is provided allowing for other commands and options to be specified within the Wake On LAN packet. The protocol allows for signaling power management circuits in a host computer in response to messages received through a network interface. Logic coupled to the network interface detects a received network packet carrying a message from a source to the management circuits in the host computer. The logic includes security logic that is responsive to data in the packet to authenticate the source of the message, to accept the message and generate a signal to the management circuit in the host computer when the message passes authentication, and to discard the message when the message fails authentication. The message includes a message authentication code timestamp indicating a time at which the source produced the message and/or a random value token.

Abstract: In a Local Area Network (LAN) system, an ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency.

Abstract: A network transmitter (driver or adaptor/driver combination reorders packets received for transmission from a higher layer protocol based on packet destinations. The invention reduces bottlenecks at the transmitter and potentially throughout network intermediate system. Destination based reordering may be accomplished through alternative methods, some alternatives taking into account the order at which packets to different destinations are queued by a higher layer protocol.

Abstract: In a Local Area Network (LAN) system, an ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter may also be programmed to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency.

Abstract: A method allows a designer to implement software for a wide variety of variant host architectures, without excessive usage of host memory, nor sacrificing the capabilities of high end versions of the variant architectures available. The method is based on providing an initialization module of the software to host memory. A portion of the initialization module determines the host architecture. Based on the determined host architecture, the unneeded portions of the initialization module are freed, and the needed portions are relocated into a contiguous memory space to minimize host memory usage. Any location dependent entries in the needed portions of the program are then updated based on the relocation. The initialization module includes a plurality of code blocks, each of which is optimized to a particular variant architecture. When the variant architecture of the host is identified, those code blocks which are optimized to the identified host are selected and the other code blocks are freed.

Abstract: In a Local Area Network (LAN) system, an ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency.

Abstract: A method allows a designer to implement software for a wide variety of variant host architectures, without excessive usage of host memory, nor sacrificing the capabilities of high end versions of the variant architectures available. The method is based on providing an initialization module of the software to host memory. A portion of the initialization module determines the host architecture. Based on the determined host architecture, the unneeded portions of the initialization module are freed, and the needed portions are relocated into a contiguous memory space to minimize host memory usage. Any location dependent entries in the needed portions of the program are then updated based on the relocation. The initialization module includes a plurality of code blocks, each of which is optimized to a particular variant architecture. When the variant architecture of the host is identified, those code blocks which are optimized to the identified host are selected and the other code blocks are freed.

Abstract: In a computer system having a central processing unit which employs software drivers as part of a host for controlling peripheral units and including a bus for connecting with adapters for the peripheral units, wherein each adapter has distributed intelligence means for interpreting simple command information and a nonvolatile storage element for storing default configuration information, including a default port address for communication, a method is provided for configuring such intelligent adapters connected to the bus.

Abstract: In a Local Area Network (LAN) system, an ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter may also be programmed to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency.