Patents by Inventor Glenn Watanabe

Glenn Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low noise amplifier having bypass circuitry
    Patent number: 6522195
    Abstract: A low noise amplifier (10) having an amplifier mode and a bypass mode. In the amplifier mode the input signal received at an input terminal (12) is amplified by an amplifying transistor (40) and the output signal supplied at an output terminal (50). In the bypass mode the input signal is not amplified, but transferred by a bypass circuit (22) from the base to the collector of the amplifying transistor. An input impedance matching circuit (14) and an output impedance matching circuit (44), along with the bypass circuit (22) provide a constant input and output impedance when the low noise amplifier (10) operates in the amplifier mode and the bypass mode.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: February 18, 2003
    Assignee: Motorola, Inc.
    Inventors: Glenn A. Watanabe, Thomas E. Schiltz, Sin Kai Henry Lau
  • Single-to-differential buffer amplifier
    Patent number: 6441688
    Abstract: A radio frequency single to differential buffer amplifier provides a 180 degree phase difference between two output signals by using a current mirroring circuit and using different referencing on the two output signals. Fine adjustment on the phase of the two output signals can be done by adjusting a phase adjustment device embedded in a cascode amplifier. High input power handling capability is accomplished by class AB operation on two input transistors in the amplifier.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: August 27, 2002
    Assignee: Motorola, Inc.
    Inventors: Sin Kai Henry Lau, Glenn Watanabe
  • Low noise amplifier having bypass circuitry
    Publication number: 20020070809
    Abstract: A low noise amplifier (10) having an amplifier mode and a bypass mode. In the amplifier mode the input signal received at an input terminal (12) is amplified by an amplifying transistor (40) and the output signal supplied at an output terminal (50). In the bypass mode the input signal is not amplified, but transferred by a bypass circuit (22) from the base to the collector of the amplifying transistor. An input impedance matching circuit (14) and an output impedance matching circuit (44), along with the bypass circuit (22) provide a constant input and output impedance when the low noise amplifier (10) operates in the amplifier mode and the bypass mode.
    Type: Application
    Filed: December 7, 2000
    Publication date: June 13, 2002
    Applicant: Motorola, Inc.
    Inventors: Glenn A. Watanabe, Thomas E. Schiltz, Sin Kai Henry Lau
  • Method and apparatus for amplifying a radio frequency signal
    Patent number: 6404283
    Abstract: The present invention concerns a method for variable linear amplification and an apparatus for a variable linear amplifier, which is particularly suited for RF communication applications. One embodiment includes a high gain circuit in communication with a transconductor to receive an RF signal, a low gain circuit in communication with the transconductor and a current dissipation circuit in communication with the transconductor and a ground source. In one embodiment, the high gain circuit is a NMOS device which is characteristically larger than the low gain device.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: June 11, 2002
    Assignee: Motorola, Inc.
    Inventors: Sin Kai Henry Lau, Glenn Watanabe