Patents by Inventor Gloria Alejandra Camacho Bragado

Gloria Alejandra Camacho Bragado has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8621744
    Abstract: A method of manufacturing an inductor for a microelectronic device comprises providing a substrate (610), forming a first plurality of inductor windings (111, 211, 411, 620, 2030) over the substrate, forming a magnetic inductor core (112, 212, 412, 810) over the first plurality of inductor windings, and forming a second plurality of inductor windings (113, 213, 413, 1010) over the magnetic inductor core. In another embodiment, the method comprises forming the inductor on a sacrificial substrate (1610) such that the inductor can subsequently be mounted onto a carrier tape (1810). In yet another embodiment, a method of manufacturing a substrate for a microelectronic device comprises forming an inductor within a build-up layer (101, 102, 103, 104) of a substrate.
    Type: Grant
    Filed: August 23, 2011
    Date of Patent: January 7, 2014
    Assignee: Intel Corporation
    Inventors: Aleksandar Aleksov, Gloria Alejandra Camacho-Bragado
  • Publication number: 20120321682
    Abstract: The disclosure relates to a cosmetic composition comprising mesoporous titania with a particle size optimized to provide UV light absorption without the risk of penetrating the skin; and to methods for preventing or reducing ultraviolet radiation damage to the body. The particle size of the mesoporous titania is typically from about 0.3 microns to about 250 microns. The pore size of the mesoporous titania is typically from about 2 nm to about 100 nm. The crystallite/wall size of the mesoporous titania is typically from about 2 nm to about 200 nm.
    Type: Application
    Filed: February 15, 2011
    Publication date: December 20, 2012
    Applicant: L'OREAL
    Inventor: Gloria Alejandra Camacho Bragado
  • Publication number: 20110302771
    Abstract: A method of manufacturing an inductor for a microelectronic device comprises providing a substrate (610), forming a first plurality of inductor windings (111, 211, 411, 620, 2030) over the substrate, forming a magnetic inductor core (112, 212, 412, 810) over the first plurality of inductor windings, and forming a second plurality of inductor windings (113, 213, 413, 1010) over the magnetic inductor core. In another embodiment, the method comprises forming the inductor on a sacrificial substrate (1610) such that the inductor can subsequently be mounted onto a carrier tape (1810). In yet another embodiment, a method of manufacturing a substrate for a microelectronic device comprises forming an inductor within a build-up layer (101, 102, 103, 104) of a substrate.
    Type: Application
    Filed: August 23, 2011
    Publication date: December 15, 2011
    Inventors: Aleksandar Aleksov, Gloria Alejandra Camacho-Bragado
  • Publication number: 20110240349
    Abstract: A multiple die structure includes a first die (110), a second die (120), a carbon nanotube (130) having a first end (131) in physical contact with the first die and having a second end (132) in physical contact with the second die, and an electrically conductive material (240) in physical contact with the first end of the carbon nanotube and in physical contact with the first die. Forming a connection between the first die and the second die can include providing a connection structure (400, 500, 600, 900) in which the electrically conductive material is adjacent to the carbon nanotube, placing the connection structure adjacent to the first die and to the second die, and bonding the first die and the second die to the connection structure.
    Type: Application
    Filed: June 17, 2011
    Publication date: October 6, 2011
    Inventors: Lakshmi Supriya, Gloria Alejandra Camacho-Bragado
  • Patent number: 8017498
    Abstract: A multiple die structure includes a first die (110), a second die (120), a carbon nanotube (130) having a first end (131) in physical contact with the first die and having a second end (132) in physical contact with the second die, and an electrically conductive material (240) in physical contact with the first end of the carbon nanotube and in physical contact with the first die. Forming a connection between the first die and the second die can include providing a connection structure (400, 500, 600, 900) in which the electrically conductive material is adjacent to the carbon nanotube, placing the connection structure adjacent to the first die and to the second die, and bonding the first die and the second die to the connection structure.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: September 13, 2011
    Assignee: Intel Corporation
    Inventors: Lakshmi Supriya, Gloria Alejandra Camacho-Bragado
  • Patent number: 8004076
    Abstract: A method of forming a microelectronic package is provided. The method includes providing a silicon substrate having a plurality of carbon nanotubes disposed on a silicon layer and coupling the silicon substrate to a top surface of a packaging substrate, wherein the plurality of carbon nanotubes are coupled to a plurality of substrate pads of the packaging substrate. The method also includes removing the silicon substrate from the packaging substrate and disposing a die adjacent to the top surface of the packaging substrate, wherein the plurality of carbon nanotubes are coupled to a plurality of bump pads of the die.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: August 23, 2011
    Assignee: Intel Corporation
    Inventors: Edward A. Zarbock, Gloria Alejandra Camacho Bragado
  • Publication number: 20100078799
    Abstract: A method of forming a microelectronic package is provided. The method includes providing a silicon substrate having a plurality of carbon nanotubes disposed on a silicon layer and coupling the silicon substrate to a top surface of a packaging substrate, wherein the plurality of carbon nanotubes are coupled to a plurality of substrate pads of the packaging substrate. The method also includes removing the silicon substrate from the packaging substrate and disposing a die adjacent to the top surface of the packaging substrate, wherein the plurality of carbon nanotubes are coupled to a plurality of bump pads of the die.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 1, 2010
    Inventors: Edward A. Zarbock, Gloria Alejandra Camacho Bragado
  • Publication number: 20100072617
    Abstract: A multiple die structure includes a first die (110), a second die (120), a carbon nanotube (130) having a first end (131) in physical contact with the first die and having a second end (132) in physical contact with the second die, and an electrically conductive material (240) in physical contact with the first end of the carbon nanotube and in physical contact with the first die. Forming a connection between the first die and the second die can include providing a connection structure (400, 500, 600, 900) in which the electrically conductive material is adjacent to the carbon nanotube, placing the connection structure adjacent to the first die and to the second die, and bonding the first die and the second die to the connection structure.
    Type: Application
    Filed: September 22, 2008
    Publication date: March 25, 2010
    Inventors: Lakshmi Supriya, Gloria Alejandra Camacho-Bragado
  • Patent number: 7646093
    Abstract: An apparatus including a first die mounted on a primary side of an electronic package and a second die mounted on a secondary side of the electronic package between the electronic package and a printed circuit board. The apparatus further comprising a thermal component thermally connected to the second die and mounted on the printed circuit board, the thermal component comprising a set of pins extending from a heat sink through a set of through-holes in the printed circuit board. A method including positioning a set of thermal connectors through a printed circuit board, the thermal connectors extending from a primary side of the printed circuit board to a secondary side of the printed circuit board opposite the primary side. The method further including thermally connecting the thermal connectors to a die positioned between an electronic package and the primary side of the printed circuit board to transfer heat from the die to the secondary side of the printed circuit board.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: January 12, 2010
    Assignee: Intel Corporation
    Inventors: Henning Braunisch, Chuan Hu, Gloria Alejandra Camacho Bragado
  • Publication number: 20090309687
    Abstract: A method of manufacturing an inductor for a microelectronic device comprises providing a substrate (610), forming a first plurality of inductor windings (111, 211, 411, 620, 2030) over the substrate, forming a magnetic inductor core (112, 212, 412, 810) over the first plurality of inductor windings, and forming a second plurality of inductor windings (113, 213, 413, 1010) over the magnetic inductor core. In another embodiment, the method comprises forming the inductor on a sacrificial substrate (1610) such that the inductor can subsequently be mounted onto a carrier tape (1810). In yet another embodiment, a method of manufacturing a substrate for a microelectronic device comprises forming an inductor within a build-up layer (101, 102, 103, 104) of a substrate.
    Type: Application
    Filed: June 11, 2008
    Publication date: December 17, 2009
    Inventors: Aleksandar Aleksov, Gloria Alejandra Camacho-Bragado
  • Publication number: 20080150125
    Abstract: An apparatus including a first die mounted on a primary side of an electronic package and a second die mounted on a secondary side of the electronic package between the electronic package and a printed circuit board. The apparatus further comprising a thermal component thermally connected to the second die and mounted on the printed circuit board, the thermal component comprising a set of pins extending from a heat sink through a set of through-holes in the printed circuit board. A method including positioning a set of thermal connectors through a printed circuit board, the thermal connectors extending from a primary side of the printed circuit board to a secondary side of the printed circuit board opposite the primary side. The method further including thermally connecting the thermal connectors to a die positioned between an electronic package and the primary side of the printed circuit board to transfer heat from the die to the secondary side of the printed circuit board.
    Type: Application
    Filed: December 20, 2006
    Publication date: June 26, 2008
    Inventors: Henning Braunisch, Chuan Hu, Gloria Alejandra Camacho Bragado