Patents by Inventor GLORIA BIBAL MANAOIS

GLORIA BIBAL MANAOIS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220149003
    Abstract: A flip-chip on leadframe package includes a leadframe having a plurality of leads with each lead including an inner leadfinger portion, wherein at least a landing region of all of the inner leadfinger portions are in a single common level (or plane) and include etched areas providing bump pads having concave landing sites (landing sites). A semiconductor die (die) having an active top side surface with functional circuitry including bond pads has bumps or pillars thereon. An area of the landing sites is greater than an area of the bumps or pillars. A distal end of the bumps or pillars is within and electrically coupling to the landing sites. A mold material encapsulates the die and at least a portion of the inner leadfinger portions. The package can be a leaded package or a leadless package.
    Type: Application
    Filed: January 25, 2022
    Publication date: May 12, 2022
    Inventors: RONALDO MARASIGAN ARGUELLES, EDGAR DOROTAYO BALIDOY, GLORIA BIBAL MANAOIS, BERNARD KAEBIN ANDRES ANCHETA
  • Patent number: 11233031
    Abstract: A flip-chip on leadframe package includes a leadframe having a plurality of leads with each lead including an inner leadfinger portion, wherein at least a landing region of all of the inner leadfinger portions are in a single common level (or plane) and include etched areas providing bump pads having concave landing sites (landing sites). A semiconductor die (die) having an active top side surface with functional circuitry including bond pads has bumps or pillars thereon. An area of the landing sites is greater than an area of the bumps or pillars. A distal end of the bumps or pillars is within and electrically coupling to the landing sites. A mold material encapsulates the die and at least a portion of the inner leadfinger portions. The package can be a leaded package or a leadless package.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: January 25, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ronaldo Marasigan Arguelles, Edgar Dorotayo Balidoy, Gloria Bibal Manaois, Bernard Kaebin Andres Ancheta
  • Patent number: 11211320
    Abstract: A semiconductor package includes a pad and leads having a planar profile shaped from a planar base metal, a semiconductor die attached to the pad, a wire bond extending from the semiconductor die to a respective lead, and mold compound covering the semiconductor die, the wire bond, and a first portion of the respective lead, wherein a second portion of the respective lead extends beyond the mold compound. A shape of the respective lead within the planar profile includes a notch indented relative to a first elongated side of the shape of the respective lead and a protrusion protruding outwardly relative to a second elongated side of the shape of the respective lead. The notch and the protrusion are each partially covered by the mold compound and partially outside the mold compound.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: December 28, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dolores Babaran Milo, Joe Ann Feive Carbonell Lopez, Gloria Bibal Manaois, Kevin John Bersamira Delos Santos
  • Publication number: 20210202365
    Abstract: A semiconductor package includes a pad and leads having a planar profile shaped from a planar base metal, a semiconductor die attached to the pad, a wire bond extending from the semiconductor die to a respective lead, and mold compound covering the semiconductor die, the wire bond, and a first portion of the respective lead, wherein a second portion of the respective lead extends beyond the mold compound. A shape of the respective lead within the planar profile includes a notch indented relative to a first elongated side of the shape of the respective lead and a protrusion protruding outwardly relative to a second elongated side of the shape of the respective lead. The notch and the protrusion are each partially covered by the mold compound and partially outside the mold compound.
    Type: Application
    Filed: December 31, 2019
    Publication date: July 1, 2021
    Inventors: Dolores Babaran Milo, Joe Ann Feive Carbonell Lopez, Gloria Bibal Manaois, Kevin John Bersamira Delos Santos
  • Publication number: 20170170101
    Abstract: A flip-chip on leadframe package includes a leadframe having a plurality of leads with each lead including an inner leadfinger portion, wherein at least a landing region of all of the inner leadfinger portions are in a single common level (or plane) and include etched areas providing bump pads having concave landing sites (landing sites). A semiconductor die (die) having an active top side surface with functional circuitry including bond pads has bumps or pillars thereon. An area of the landing sites is greater than an area of the bumps or pillars. A distal end of the bumps or pillars is within and electrically coupling to the landing sites. A mold material encapsulates the die and at least a portion of the inner leadfinger portions. The package can be a leaded package or a leadless package.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 15, 2017
    Inventors: RONALDO MARASIGAN ARGUELLES, EDGAR DOROTAYO BALIDOY, GLORIA BIBAL MANAOIS, BERNARD KAEBIN ANDRES ANCHETA