Patents by Inventor Go Sakaino

Go Sakaino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973312
    Abstract: A semiconductor laser device comprises a stem serving as a base; a laser diode LD submount having surface electrodes arranged thereon and joined to the surface of the stem; an LD chip joined to the surface electrode and connected with the surface electrode; and leads fixed in through holes formed in the stem by means of sealing parts and electrically connected to the surface electrodes via embedded layers in via holes formed in the LD submount, wherein grooves are formed in portions of the sealing parts or in portions of the LD submount around the connections between the leads and the embedded layers, to obtain a good modulated light waveform.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: April 30, 2024
    Assignee: Mitsubishi Electric Corporation
    Inventors: Naoki Kosaka, Ayumi Fuchida, Masaaki Shimada, Go Sakaino, Tadashi Takase
  • Publication number: 20220224071
    Abstract: A semiconductor laser device comprises a stem serving as a base; a laser diode LD submount having surface electrodes arranged thereon and joined to the surface of the stem; an LD chip joined to the surface electrode and connected with the surface electrode; and leads fixed in through holes formed in the stem by means of sealing parts and electrically connected to the surface electrodes via embedded layers in via holes formed in the LD submount, wherein grooves are formed in portions of the sealing parts or in portions of the LD submount around the connections between the leads and the embedded layers, to obtain a good modulated light waveform.
    Type: Application
    Filed: July 2, 2019
    Publication date: July 14, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Naoki KOSAKA, Ayumi FUCHIDA, Masaaki SHIMADA, Go SAKAINO, Tadashi TAKASE
  • Patent number: 11271369
    Abstract: What is provided are: an active-layer ridge which is composed of an n-type cladding layer, an active layer, a first p-type cladding layer and a second n-type blocking layer that are stacked in this order on an n-type InP substrate, and which is formed to project from a position lower than the active layer; burying layers by which both side portions of the active-layer ridge are buried up to a position higher than the active layer; first n-type blocking layers which are each stacked on a front-surface side of each of the burying layers, to be placed on the both sides of the ridge; and a second p-type cladding layer by which an end portion of the active-layer ridge and the first n-type blocking layers are buried thereunder; wherein a current narrowing window for allowing a hole current to pass therethrough is provided in and at a center of the second n-type blocking layer placed at a top of the active-layer ridge.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: March 8, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ayumi Fuchida, Naoki Nakamura, Go Sakaino
  • Patent number: 11128102
    Abstract: A semiconductor optical device is provided with a semiconductor substrate that has a length and width, a laser section that is provided on the semiconductor substrate and includes an active layer and an optical waveguide section that is provided adjacent to the laser section on the semiconductor substrate and is joined to the laser section. The optical waveguide section includes a core layer that is connected to an end portion of the active layer, and a pair of cladding layers between which the core layer is sandwiched and emits, from an emission end surface, light incident from the joining interface between the optical waveguide section and the laser section. The semiconductor optical device may be also provided with a reflection suppression layer that is provided on the upper surface of the optical waveguide section.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: September 21, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ayumi Fuchida, Go Sakaino, Tetsuya Uetsuji, Naoki Nakamura
  • Publication number: 20210044090
    Abstract: What is provided are: an active-layer ridge which is composed of an n-type cladding layer, an active layer, a first p-type cladding layer and a second n-type blocking layer that are stacked in this order on an n-type InP substrate, and which is formed to project from a position lower than the active layer; burying layers by which both side portions of the active-layer ridge are buried up to a position higher than the active layer; first n-type blocking layers which are each stacked on a front-surface side of each of the burying layers, to be placed on the both sides of the ridge; and a second p-type cladding layer by which an end portion of the active-layer ridge and the first n-type blocking layers are buried thereunder; wherein a current narrowing window for allowing a hole current to pass therethrough is provided in and at a center of the second n-type blocking layer placed at a top of the active-layer ridge.
    Type: Application
    Filed: April 4, 2018
    Publication date: February 11, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Ayumi FUCHIDA, Naoki NAKAMURA, Go SAKAINO
  • Publication number: 20210036485
    Abstract: A semiconductor optical device is provided with a semiconductor substrate that has a length and width, a laser section that is provided on the semiconductor substrate and includes an active layer and an optical waveguide section that is provided adjacent to the laser section on the semiconductor substrate and is joined to the laser section. The optical waveguide section includes a core layer that is connected to an end portion of the active layer, and a pair of cladding layers between which the core layer is sandwiched and emits, from an emission end surface, light incident from the joining interface between the optical waveguide section and the laser section. The semiconductor optical device may be also provided with a reflection suppression layer that is provided on the upper surface of the optical waveguide section.
    Type: Application
    Filed: September 7, 2017
    Publication date: February 4, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Ayumi FUCHIDA, Go SAKAINO, Tetsuya UETSUJI, Naoki NAKAMURA
  • Patent number: 10855054
    Abstract: A semiconductor laser device includes a semiconductor substrate, a resonator unit formed on the semiconductor substrate and having an active layer, a diffraction grating formed on or underneath the active layer, a front facet of an inverted mesa slope, and a rear facet, an anti-reflection coating film formed on the front facet, a reflective film formed on the rear facet, an upper electrode formed on the resonator unit, and a lower electrode formed underneath the semiconductor substrate, wherein a length in a resonator direction of the resonator unit is shorter than a length in the resonator direction of the semiconductor substrate, and a laser beam is emitted from the front facet.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: December 1, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ayumi Fuchida, Yuichiro Okunuki, Go Sakaino, Tetsuya Uetsuji, Naoki Nakamura
  • Patent number: 10784649
    Abstract: A semiconductor laser (2) includes an n-type semiconductor substrate (1), a stack of an n-type cladding layer (4), an active layer (5), and a p-type cladding layer (6) successively stacked on the n-type semiconductor substrate (1). An optical waveguide (3) includes a non-impurity-doped core layer (9) provided on a light output side of the semiconductor laser (2) on the n-type semiconductor substrate (1) and having a larger forbidden band width than the active layer (5), and a cladding layer (10) provided on the core layer (9) and having a lower carrier concentration than the p-type cladding layer (6). The semiconductor laser (2) includes a carrier injection region (X1), and a non-carrier-injection region (X2) provided between the carrier injection region (X1) and the optical waveguide (3).
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: September 22, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Go Sakaino, Naoki Nakamura, Yuichiro Okunuki
  • Publication number: 20200083671
    Abstract: A semiconductor laser (2) includes an n-type semiconductor substrate (1), a stack of an n-type cladding layer (4), an active layer (5), and a p-type cladding layer (6) successively stacked on the n-type semiconductor substrate (1). An optical waveguide (3) includes a non-impurity-doped core layer (9) provided on a light output side of the semiconductor laser (2) on the n-type semiconductor substrate (1) and having a larger forbidden band width than the active layer (5), and a cladding layer (10) provided on the core layer (9) and having a lower carrier concentration than the p-type cladding layer (6). The semiconductor laser (2) includes a carrier injection region (X1), and a non-carrier-injection region (X2) provided between the carrier injection region (X1) and the optical waveguide (3).
    Type: Application
    Filed: March 23, 2017
    Publication date: March 12, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Go SAKAINO, Naoki NAKAMURA, Yuichiro OKUNUKI
  • Publication number: 20190334317
    Abstract: A semiconductor laser device includes a semiconductor substrate, a resonator unit formed on the semiconductor substrate and having an active layer, a diffraction grating formed on or underneath the active layer, a front facet of an inverted mesa slope, and a rear facet, an anti-reflection coating film formed on the front facet, a reflective film formed on the rear facet, an upper electrode formed on the resonator unit, and a lower electrode formed underneath the semiconductor substrate, wherein a length in a resonator direction of the resonator unit is shorter than a length in the resonator direction of the semiconductor substrate, and a laser beam is emitted from the front facet.
    Type: Application
    Filed: January 19, 2017
    Publication date: October 31, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Ayumi FUCHIDA, Yuichiro OKUNUKI, Go SAKAINO, Tetsuya UETSUJI, Naoki NAKAMURA
  • Patent number: 9929530
    Abstract: An optical semiconductor device has a semiconductor laser which emits front-end-surface-side emergent light on the front end surface side and emits rear-end-surface-side emergent light on the rear end surface side, and a mount substrate having the semiconductor laser provided on its front surface. The rear-end-surface-side emergent light is emitted while having an emergence optical axis that extends away from the mount substrate with increase in distance from the rear end surface.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: March 27, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yosuke Suzuki, Yuichiro Okunuki, Go Sakaino, Naoki Nakamura, Ryoko Suzuki
  • Publication number: 20170214215
    Abstract: An optical semiconductor device has a semiconductor laser which emits front-end-surface-side emergent light on the front end surface side and emits rear-end-surface-side emergent light on the rear end surface side, and a mount substrate having the semiconductor laser provided on its front surface. The rear-end-surface-side emergent light is emitted while having an emergence optical axis that extends away from the mount substrate with increase in distance from the rear end surface.
    Type: Application
    Filed: August 29, 2016
    Publication date: July 27, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yosuke SUZUKI, Yuichiro OKUNUKI, Go SAKAINO, Naoki NAKAMURA, Ryoko SUZUKI
  • Patent number: 9564737
    Abstract: An upper cladding layer includes a first low carrier concentration layer having a lower carrier concentration than the p-type cladding layer and a first Fe-doped semiconductor layer formed on the first low carrier concentration layer. The leakage current suppression layer includes a second Fe-doped semiconductor layer disposed on a side of the p-type semiconductor layer. The first low carrier concentration layer has a side wall part that is in contact with a side face of the p-type cladding layer. The first Fe-doped semiconductor layer is disposed on a side of the p-type cladding layer via the side wall part of the first low carrier concentration layer and is not in contact with the p-type cladding layer.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: February 7, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventor: Go Sakaino
  • Publication number: 20160211650
    Abstract: An upper cladding layer includes a first low carrier concentration layer having a lower carrier concentration than the p-type cladding layer and a first Fe-doped semiconductor layer formed on the first low carrier concentration layer. The leakage current suppression layer includes a second Fe-doped semiconductor layer disposed on a side of the p-type semiconductor layer. The first low carrier concentration layer has a side wall part that is in contact with a side face of the p-type cladding layer. The first Fe-doped semiconductor layer is disposed on a side of the p-type cladding layer via the side wall part of the first low carrier concentration layer and is not in contact with the p-type cladding layer.
    Type: Application
    Filed: October 20, 2015
    Publication date: July 21, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Go SAKAINO
  • Patent number: 9257815
    Abstract: An optical semiconductor device includes: a mesa stripe structure including an n-type cladding layer, an active layer, and a p-type cladding layer laid one on another; and a buried layer buried on opposite sides of the mesa stripe structure, wherein the active layer is a multiple quantum well structure having well layers and carbon-doped barrier layers, the buried layer includes a p-type semiconductor layer and an Fe-doped or Ru-doped high-resistance semiconductor layer laid one on another, side surfaces of the n-type cladding layer are covered with the p-type semiconductor layer and are not contiguous with the high-resistance semiconductor layer, and side surfaces of the active layer are not contiguous with the p-type semiconductor layer.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: February 9, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventor: Go Sakaino
  • Publication number: 20160028213
    Abstract: An optical semiconductor device includes: a mesa stripe structure including an n-type cladding layer, an active layer, and a p-type cladding layer laid one on another; and a buried layer buried on opposite sides of the mesa stripe structure, wherein the active layer is a multiple quantum well structure having well layers and carbon-doped barrier layers, the buried layer includes a p-type semiconductor layer and an Fe-doped or Ru-doped high-resistance semiconductor layer laid one on another, side surfaces of the n-type cladding layer are covered with the p-type semiconductor layer and are not contiguous with the high-resistance semiconductor layer, and side surfaces of the active layer are not contiguous with the p-type semiconductor layer.
    Type: Application
    Filed: April 21, 2015
    Publication date: January 28, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventor: Go SAKAINO
  • Patent number: 8472490
    Abstract: A semiconductor optical element and an integrated semiconductor optical element suppressing leakage current flow through a burying layer. A mesa-stripe-shaped laminate structure includes a p-type cladding layer, an active layer, and an n-type cladding layer. A burying layer on a side of the laminated structure includes, a first p-type semiconductor layer, a first n-type semiconductor layer, an Fe-doped semiconductor layer, a second n-type semiconductor layer, a low carrier concentration semiconductor layer, and a second p-type semiconductor layer. The Fe-doped semiconductor layer is not grown on a (111)B surface of the first p-type semiconductor layer and of the first n-type semiconductor layer. The second n-type semiconductor layer is not grown on a (111)B surface of the first p-type semiconductor layer, of the first n-type semiconductor layer, and of the Fe-doped semiconductor layer.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: June 25, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventor: Go Sakaino
  • Publication number: 20130070798
    Abstract: A semiconductor laser includes a semiconductor laser portion including an active layer portion having a p-type cladding layer, an active layer, and an n-type cladding layer on a p-type InP semiconductor substrate; and current confining structures that fill spaces on both sides of the semiconductor laser portion. Each of the current confining structures includes a first p-type InP layer, a Ru-doped InP layer, and a second p-type InP layer. The Ru-doped InP layer is in contact only with the first and second p-type InP layers. To obtain the structure, timing of introduction of a halogen-containing gas is adjusted.
    Type: Application
    Filed: August 16, 2012
    Publication date: March 21, 2013
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Go Sakaino, Harunaka Yamaguchi, Takashi Nagira
  • Publication number: 20110158279
    Abstract: A semiconductor optical element and an integrated semiconductor optical element suppressing leakage current flow through a burying layer. A mesa-stripe-shaped laminate structure includes a p-type cladding layer, an active layer, and an n-type cladding layer. A burying layer on a side of the laminated structure includes, a first p-type semiconductor layer, a first n-type semiconductor layer, an Fe-doped semiconductor layer, a second n-type semiconductor layer, a low carrier concentration semiconductor layer, and a second p-type semiconductor layer. The Fe-doped semiconductor layer is not grown on a (111)B surface of the first p-type semiconductor layer and of the first n-type semiconductor layer. The second n-type semiconductor layer is not grown on a (111)B surface of the first p-type semiconductor layer, of the first n-type semiconductor layer, and of the Fe-doped semiconductor layer.
    Type: Application
    Filed: May 13, 2010
    Publication date: June 30, 2011
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Go Sakaino
  • Patent number: 7835413
    Abstract: A semiconductor laser comprises: a ridge structure including a p-type cladding layer, an active layer, and an n-type cladding layer stacked on one another; and a burying layer burying sides of the ridge structure. The burying layer includes a p-type semiconductor layer and an n-type semiconductor layer that form a pn junction; and one of the p-type semiconductor layer and the n-type semiconductor layer has a carrier concentration of 5×1017 cm?3 or less near the pn junction.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: November 16, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tohru Takiguchi, Yuichiro Okunuki, Go Sakaino