Patents by Inventor Go Uehara

Go Uehara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11068180
    Abstract: A higher-level system that inputs and outputs data to/from a storage area including one or more logical areas respectively provided from one or more NVM drives manages the storage area, and manages a plurality of chunks that are a plurality of areas forming the storage area, each of the chunks being a unit of data input/output and being an non-overwritable area. Each of the plurality of chunks has the same chunk size, and each of the plurality of chunks includes a part of each of one or more logical areas. Each of the plurality of chunks includes, for each of the one or more NVM drives, all or part of one or more logical blocks that are one or more ranges corresponding to one or more physical blocks, respectively, but does not include at least a part of a logical block that is entirely or partially included in another chunk.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: July 20, 2021
    Assignee: HITACHI, LTD.
    Inventors: Yukihiro Yoshino, Junji Ogawa, Go Uehara
  • Publication number: 20200192573
    Abstract: A higher-level system that inputs and outputs data to/from a storage area including one or more logical areas respectively provided from one or more NVM drives manages the storage area, and manages a plurality of chunks that are a plurality of areas forming the storage area, each of the chunks being a unit of data input/output and being an non-overwritable area. Each of the plurality of chunks has the same chunk size, and each of the plurality of chunks includes a part of each of one or more logical areas. Each of the plurality of chunks includes, for each of the one or more NVM drives, all or part of one or more logical blocks that are one or more ranges corresponding to one or more physical blocks, respectively, but does not include at least a part of a logical block that is entirely or partially included in another chunk.
    Type: Application
    Filed: September 9, 2019
    Publication date: June 18, 2020
    Applicant: HITACHI, LTD.
    Inventors: Yukihiro YOSHINO, Junji OGAWA, Go UEHARA
  • Publication number: 20190163399
    Abstract: An information processing system and method effectively prevents data loss and the like caused by the duplicate execution of commands. A controller writes a command for a device to a corresponding command queue. The device fetches the command from the corresponding command queue. The command includes a field for storing fetch information which indicates whether the command has been fetched. The device refers to a value of the fetch information of the fetched command. If the value of the fetch information is a first value indicating that the command has not been fetched, the device executes the command after updating the value of the fetch information of the command which is stored in the corresponding command queue to a second value indicating that the command has been fetched. If the value of the fetch information is the second value, the device executes predetermined error processing instead of executing the command.
    Type: Application
    Filed: September 6, 2018
    Publication date: May 30, 2019
    Inventors: Takashi OKADA, Go UEHARA, Yusaku KIYOTA
  • Patent number: 10204003
    Abstract: A failure region is specified when a failure occurs in a non-volatile semiconductor memory. When a device controller reads data stored in a specific page in a plurality of non-volatile semiconductor memories to detect an uncorrectable error (UE) of the data stored in the specific page, the device controller executes a diagnosis process including specifying a specific storage circuit that is a storage circuit including the specific page, reading data stored in a part of blocks of the specific storage circuit, and specifying, on the basis of a result of reading data stored in the block, a failure region in the specific storage circuit.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: February 12, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Kenta Ninose, Takuji Itou, Fumio Yoshioka, Takashi Tsunehiro, Go Uehara, Shigeo Homma
  • Patent number: 10013322
    Abstract: A storage controller stores, for each of a plurality of storage devices, a usable capacity, which is a capacity usable by the storage controller in a logical storage area, configures a first RAID group using a first storage device group among the plurality of storage devices, and allocates, on the basis of a request from a host computer, one of a plurality of pages of the logical storage area in the first RAID group to a virtual volume. The storage controller reduces, when receiving first failure information indicating a failure in a first storage device in the first storage device group from the first storage device, a usable capacity of the first storage device on the basis of the first failure information.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: July 3, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Go Uehara, Shigeo Homma, Koji Sonoda
  • Patent number: 9817768
    Abstract: Provided is a storage system including: a storage medium including a plurality of physical storage areas having an upper limit number of rewrites, and a medium controller that controls I/O (input/output) of data to/from the plurality of physical storage areas; and a storage controller connected to the storage medium, wherein when any of the physical storage areas is not allocated to a write destination logical storage area among a plurality of logical storage areas, the medium controller allocates a vacant physical storage area among the plurality of physical storage areas to the write destination logical storage area and writes write target data to the allocated vacant physical storage area, and the plurality of logical storage areas includes an available logical area group determined based on a relationship between an available capacity of a logical storage capacity and a rewrite frequency of the plurality of physical storage areas.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: November 14, 2017
    Assignee: HITACHI, LTD.
    Inventors: Keisuke Ueda, Go Uehara, Kenta Ninose, Hiroshi Hirayama
  • Patent number: 9684591
    Abstract: A storage system comprises a first controller and a plurality of storage devices. The plurality of storage devices configure RAID, each of which includes one or more non-volatile memory chips providing storage space where data from a host computer is stored, and a second controller coupled to the non-volatile memory chips. In case where the first controller receives an update request to update first data to second data from the host computer, the second controller in a first storage device of the storage devices is configured to store the second data in an area different from an area where the first data has been stored, in the storage space of the first storage device; generate information that relates the first data and the second data; and generate an intermediate parity based on the first and the second data.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: June 20, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Go Uehara, Shigeo Homma, Yoshiyuki Noborikawa
  • Publication number: 20160259675
    Abstract: A failure region is specified when a failure occurs in a non-volatile semiconductor memory. When a device controller reads data stored in a specific page in a plurality of non-volatile semiconductor memories to detect an uncorrectable error (UE) of the data stored in the specific page, the device controller executes a diagnosis process including specifying a specific storage circuit that is a storage circuit including the specific page, reading data stored in a part of blocks of the specific storage circuit, and specifying, on the basis of a result of reading data stored in the block, a failure region in the specific storage circuit.
    Type: Application
    Filed: August 27, 2014
    Publication date: September 8, 2016
    Applicant: HITACHI, LTD.
    Inventors: Kenta NINOSE, Takuji ITOU, Fumio YOSHIOKA, Takashi TSUNEHIRO, Go UEHARA, Shigeo HOMMA
  • Patent number: 9335929
    Abstract: A nonvolatile semiconductor storage system has multiple nonvolatile semiconductor storage media, a control circuit having a media interface group (one or more interface devices) coupled to the multiple nonvolatile semiconductor storage media, and multiple switches. The media interface group and the multiple switches are coupled via data buses, and each switch and each of two or more nonvolatile chips are coupled via a data bus. The switch is configured so as to switch a coupling between a data bus coupled to the media interface group and a data bus coupled to any of multiple nonvolatile chips that are coupled to this switch. The control circuit partitions write-target data into multiple data elements, switches a coupling by controlling the multiple switches, and distributively sends the multiple data elements to multiple nonvolatile chips.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: May 10, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Atsushi Ishikawa, Koji Sonoda, Go Uehara, Junji Ogawa, Hideyuki Koseki
  • Publication number: 20160019159
    Abstract: Provided is a storage system including: a storage medium including a plurality of physical storage areas having an upper limit number of rewrites, and a medium controller that controls I/O (input/output) of data to/from the plurality of physical storage areas; and a storage controller connected to the storage medium, wherein when any of the physical storage areas is not allocated to a write destination logical storage area among a plurality of logical storage areas, the medium controller allocates a vacant physical storage area among the plurality of physical storage areas to the write destination logical storage area and writes write target data to the allocated vacant physical storage area, and the plurality of logical storage areas includes an available logical area group determined based on a relationship between an available capacity of a logical storage capacity and a rewrite frequency of the plurality of physical storage areas.
    Type: Application
    Filed: October 10, 2013
    Publication date: January 21, 2016
    Applicant: Hitachi, Ltd.
    Inventors: KEISUKE UEDA, Go UEHARA, Kenta NINOSE, Hiroshi HIRAYAMA
  • Publication number: 20160004615
    Abstract: A storage controller stores, for each of a plurality of storage devices, a usable capacity, which is a capacity usable by the storage controller in a logical storage area, configures a first RAID group using a first storage device group among the plurality of storage devices, and allocates, on the basis of a request from a host computer, one of a plurality of pages of the logical storage area in the first RAID group to a virtual volume. The storage controller reduces, when receiving first failure information indicating a failure in a first storage device in the first storage device group from the first storage device, a usable capacity of the first storage device on the basis of the first failure information.
    Type: Application
    Filed: June 3, 2013
    Publication date: January 7, 2016
    Inventors: Go UEHARA, Shigeo HOMMA, Koji SONODA
  • Publication number: 20150106555
    Abstract: A nonvolatile semiconductor storage system has multiple nonvolatile semiconductor storage media, a control circuit having a media interface group (one or more interface devices) coupled to the multiple nonvolatile semiconductor storage media, and multiple switches. The media interface group and the multiple switches are coupled via data buses, and each switch and each of two or more nonvolatile chips are coupled via a data bus. The switch is configured so as to switch a coupling between a data bus coupled to the media interface group and a data bus coupled to any of multiple nonvolatile chips that are coupled to this switch. The control circuit partitions write-target data into multiple data elements, switches a coupling by controlling the multiple switches, and distributively sends the multiple data elements to multiple nonvolatile chips.
    Type: Application
    Filed: December 17, 2014
    Publication date: April 16, 2015
    Applicant: Hitachi, Ltd.
    Inventors: ATSUSHI ISHIKAWA, Koji Sonoda, Go Uehara, Junji Ogawa, Hideyuki Koseki
  • Patent number: 8949511
    Abstract: A nonvolatile semiconductor storage system has multiple nonvolatile semiconductor storage media, a control circuit having a media interface group (one or more interface devices) coupled to the multiple nonvolatile semiconductor storage media, and multiple switches. The media interface group and the multiple switches are coupled via data buses, and each switch and each of two or more nonvolatile chips are coupled via a data bus. The switch is configured so as to switch a coupling between a data bus coupled to the media interface group and a data bus coupled to any of multiple nonvolatile chips that are coupled to this switch. The control circuit partitions write-target data into multiple data elements, switches a coupling by controlling the multiple switches, and distributively sends the multiple data elements to multiple nonvolatile chips.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: February 3, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Atsushi Ishikawa, Koji Sonoda, Go Uehara, Junji Ogawa, Hideyuki Koseki
  • Patent number: 8832371
    Abstract: A storage system having multiple flash memory packages including flash memory chips and package controllers for controlling access to the flash memory chips is configured such that the package controller receives from a higher-level apparatus, which sends a write request, frequency prediction information that enables prediction of an update frequency with respect to data, which is to be a write target, and when writing data for which a write request has been issued from the higher-level apparatus, control is executed such that data, which is predicted to have a relatively high update frequency based on the frequency prediction information, is preferentially stored in a physical block with the large remaining number of erases in a flash memory chip of flash memory package of the package controller, or such that data, which is predicted to have a relatively low update frequency based on the frequency prediction information, is preferentially stored in a physical block with the small remaining number of erases i
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: September 9, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Go Uehara, Koji Sonoda, Junji Ogawa
  • Patent number: 8819338
    Abstract: A storage system comprises a first controller and a plurality of storage devices. The plurality of storage devices configure RAID, each of which includes one or more non-volatile memory chips providing storage space where data from a host computer is stored, and a second controller coupled to the non-volatile memory chips. In case where the first controller receives an update request to update first data to second data from the host computer, the second controller in a first storage device of the storage devices is configured to store the second data in an area different from an area where the first data has been stored, in the storage space of the first storage device; generate information that relates the first data and the second data; and generate an intermediate parity based on the first and the second data.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: August 26, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Go Uehara, Shigeo Homma, Yoshiyuki Noborikawa
  • Patent number: 8806125
    Abstract: A storage system constituted such that power saving to an administrator-desired storage device can be performed from a management device. That is, the storage system comprises a power-saving indication receiving section for receiving from a management console a power-saving indication specifying at least one storage device of a plurality of RAID groups, a plurality of logical units, and a plurality of physical storage devices; and a power-saving controller for saving on power to one or more physical storage devices corresponding to the storage device specified in this power-saving indication.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: August 12, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Yoshifumi Zimoto, Go Uehara, Kenji Muraoka, Masaaki Kobayashi
  • Patent number: 8738866
    Abstract: A storage system comprises multiple memory packages and a storage controller. The multiple memory packages respectively comprise multiple nonvolatile semiconductor memory devices for storing data, and a memory controller for controlling the reading/writing of data from/to these multiple semiconductor memory devices, and the storage controller receives an I/O command issued from a host computer, creates, on the basis of the received I/O command, a first level command for controlling the multiple memory packages, and sends this first level command to the multiple memory packages. The memory controllers of the multiple memory packages create a second level command for the multiple nonvolatile semiconductor memory devices inside its own memory package, and estimate the power to be consumed in its own memory package. In a case where the estimated power consumption exceeds a preconfigured permissible power, suspends the execution of the received second level command.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: May 27, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Koji Sonoda, Go Uehara
  • Publication number: 20140089729
    Abstract: A storage system includes a plurality of nonvolatile memory devices that each includes a plurality of nonvolatile memory chips, and a storage controller configured to perform input and output of data to and from a RAID group comprised by storage areas of the plurality of nonvolatile memory devices. A nonvolatile memory device identifies a failure occurrence area that is a storage area in which a failure occurred in the plurality of nonvolatile memory chips, excludes the failure occurrence area from a storage area allocated to the RAID group, and transmits failure occurrence information that is information relating to the failure that has occurred in the nonvolatile memory device to the storage controller. When the failure occurrence information is received, the storage controller reconstructs data that had been stored in a storage area including at least the failure occurrence area of the nonvolatile memory device.
    Type: Application
    Filed: September 24, 2012
    Publication date: March 27, 2014
    Applicant: Hitachi, Ltd.
    Inventors: Koji Sonoda, Go Uehara
  • Publication number: 20130297856
    Abstract: A storage system comprises multiple memory packages and a storage controller. The multiple memory packages respectively comprise multiple nonvolatile semiconductor memory devices for storing data, and a memory controller for controlling the reading/writing of data from/to these multiple semiconductor memory devices, and the storage controller receives an I/O command issued from a host computer, creates, on the basis of the received I/O command, a first level command for controlling the multiple memory packages, and sends this first level command to the multiple memory packages. The memory controllers of the multiple memory packages create a second level command for the multiple nonvolatile semiconductor memory devices inside its own memory package, and estimate the power to be consumed in its own memory package. In a case where the estimated power consumption exceeds a preconfigured permissible power, suspends the execution of the received second level command.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 7, 2013
    Inventors: Koji Sonoda, Go Uehara
  • Publication number: 20130290613
    Abstract: A storage system comprises a first controller and a plurality of storage devices. The plurality of storage devices configure RAID, each of which includes one or more non-volatile memory chips providing storage space where data from a host computer is stored, and a second controller coupled to the non-volatile memory chips. In case where the first controller receives an update request to update first data to second data from the host computer, the second controller in a first storage device of the storage devices is configured to store the second data in an area different from an area where the first data has been stored, in the storage space of the first storage device; generate information that relates the first data and the second data; and generate an intermediate parity based on the first and the second data.
    Type: Application
    Filed: April 22, 2013
    Publication date: October 31, 2013
    Applicant: Hitachi, Ltd.
    Inventors: Go UEHARA, Shigeo HOMMA, Yoshiyuki NOBORIKAWA