Patents by Inventor Go Urakawa
Go Urakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11652046Abstract: According to one or more embodiments, a semiconductor integrated circuit device includes a first inductor portion, a second inductor portion, and a third inductor portion. The first inductor portion is in a first region of a first wiring layer. The second inductor portion is disposed in a second region of the first wiring layer. The third inductor portion is on a second wiring layer spaced from the first wiring layer in a first direction. The third inductor portion includes a first end portion electrically connected to a first end of the first inductor portion, a second end portion electrically connected to a first end of the second inductor portion, and a third end portion between the first and second end portions. The first inductor portion, the second inductor portion, and the third inductor portion constitute an inductor element.Type: GrantFiled: August 28, 2020Date of Patent: May 16, 2023Assignee: Kioxia CorporationInventor: Go Urakawa
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Publication number: 20230092151Abstract: A semiconductor integrated circuit includes a calibration control circuit configured to generate a setting value for a frequency of a first clock signal, based on a frequency of a second clock signal and a frequency of a third clock signal obtained by dividing the first clock signal by a first frequency division ratio, a phase-locked loop configured to generate a control voltage signal based on a difference in phase between the second and third clock signals, and generate the first clock signal based on the generated control voltage and the setting value, and a determination control circuit configured to determine whether the first and second clock signals are in a locked state, and update the first frequency division ratio based on whether the first and second clock signals are in the locked state.Type: ApplicationFiled: February 24, 2022Publication date: March 23, 2023Inventor: Go URAKAWA
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Publication number: 20220085796Abstract: A semiconductor integrated circuit includes a first circuit and a second circuit. The first circuit is configured to divide a first pulse signal having a first duty cycle by N (where N is an integer of 2 or more), and output 2×N second pulse signals of which phases are different from each other. The first pulse signal is a pair of differential signals. The second circuit is configured to receive one or more selection signals and calculate a logical product of one of the one or more selection signals and two of the 2×N second pulse signals to generate a third pulse signal having a second duty cycle less than the first duty cycle.Type: ApplicationFiled: March 3, 2021Publication date: March 17, 2022Inventor: Go URAKAWA
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Patent number: 11258433Abstract: A semiconductor integrated circuit includes a first circuit and a second circuit. The first circuit is configured to divide a first pulse signal having a first duty cycle by N (where N is an integer of 2 or more), and output 2×N second pulse signals of which phases are different from each other. The first pulse signal is a pair of differential signals. The second circuit is configured to receive one or more selection signals and calculate a logical product of one of the one or more selection signals and two of the 2×N second pulse signals to generate a third pulse signal having a second duty cycle less than the first duty cycle.Type: GrantFiled: March 3, 2021Date of Patent: February 22, 2022Assignee: KIOXIA CORPORATIONInventor: Go Urakawa
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Patent number: 11258403Abstract: A voltage controlled oscillator includes a first inductor; a first variable capacitance unit including a first variable capacitance element having a variable capacitance and a second variable capacitance element having a variable capacitance; a first node configured for application of a first voltage to the first variable capacitance unit; a cross-coupled unit including a first transistor and a second transistor, an output of the first transistor connected to an input of the second transistor; a current source configured to flow a current through the first inductor, the first transistor, and the second transistor; a second variable capacitance unit including a third variable capacitance element having a variable capacitance, and a fourth variable capacitance element having a variable capacitance; and a second node different from the first node configured for application of a second voltage to the second variable capacitance unit.Type: GrantFiled: August 25, 2020Date of Patent: February 22, 2022Assignee: KIOXIA CORPORATIONInventor: Go Urakawa
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Publication number: 20210287987Abstract: According to one or more embodiments, a semiconductor integrated circuit device includes a first inductor portion, a second inductor portion, and a third inductor portion. The first inductor portion is in a first region of a first wiring layer. The second inductor portion is disposed in a second region of the first wiring layer. The third inductor portion is on a second wiring layer spaced from the first wiring layer in a first direction. The third inductor portion includes a first end portion electrically connected to a first end of the first inductor portion, a second end portion electrically connected to a first end of the second inductor portion, and a third end portion between the first and second end portions. The first inductor portion, the second inductor portion, and the third inductor portion constitute an inductor element.Type: ApplicationFiled: August 28, 2020Publication date: September 16, 2021Inventor: Go URAKAWA
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Publication number: 20210083624Abstract: A voltage controlled oscillator includes a first inductor; a first variable capacitance unit including a first variable capacitance element having a variable capacitance and a second variable capacitance element having a variable capacitance; a first node configured for application of a first voltage to the first variable capacitance unit; a cross-coupled unit including a first transistor and a second transistor, an output of the first transistor connected to an input of the second transistor; a current source configured to flow a current through the first inductor, the first transistor, and the second transistor; a second variable capacitance unit including a third variable capacitance element having a variable capacitance, and a fourth variable capacitance element having a variable capacitance; and a second node different from the first node configured for application of a second voltage to the second variable capacitance unit.Type: ApplicationFiled: August 25, 2020Publication date: March 18, 2021Applicant: KIOXIA CORPORATIONInventor: Go URAKAWA
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Patent number: 10277232Abstract: A charge pump circuit of an embodiment includes a current mirror circuit, a first drive switch, a capacitor and a switch circuit. The current mirror circuit causes a current obtained by mirroring a reference current to flow to a first output terminal and a second output terminal. The first drive switch connects or disconnects the first output terminal and a charge pump output terminal. The switch circuit connects the capacitor either to a discharge path between the second output terminal and a node which provides a predetermined voltage or to a charge path between the charge pump output terminal and a GND.Type: GrantFiled: October 17, 2018Date of Patent: April 30, 2019Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Go Urakawa, Tsuneo Suzuki
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Publication number: 20190089362Abstract: A charge pump circuit of an embodiment includes a current mirror circuit, a first drive switch, a capacitor and a switch circuit. The current mirror circuit causes a current obtained by mirroring a reference current to flow to a first output terminal and a second output terminal. The first drive switch connects or disconnects the first output terminal and a charge pump output terminal. The switch circuit connects the capacitor either to a discharge path between the second output terminal and a node which provides a predetermined voltage or to a charge path between the charge pump output terminal and a GND.Type: ApplicationFiled: October 17, 2018Publication date: March 21, 2019Inventors: Go Urakawa, Tsuneo Suzuki
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Patent number: 10135450Abstract: A charge pump circuit of an embodiment includes a current mirror circuit, a first drive switch, a capacitor and a switch circuit. The current mirror circuit causes a current obtained by mirroring a reference current to flow to a first output terminal and a second output terminal. The first drive switch connects or disconnects the first output terminal and a charge pump output terminal. The switch circuit connects the capacitor either to a discharge path between the second output terminal and a node which provides a predetermined voltage or to a charge path between the charge pump output terminal and a GND.Type: GrantFiled: February 23, 2018Date of Patent: November 20, 2018Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic De4vices & Storage CorporationInventors: Go Urakawa, Tsuneo Suzuki
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Publication number: 20120223780Abstract: According to one embodiment, a voltage control oscillating circuit is provided with a ring oscillator, a control current generating unit and a constant current generating unit. The ring oscillator has an odd number of inverters connected in a ring shape. The control current generating unit converts an input control voltage into a control current and to supply the control current to the ring oscillator as a first supply current. The constant current generating unit generates a constant current and to supply the generated constant current to the ring oscillator as a second supply current which is added to the control current.Type: ApplicationFiled: September 19, 2011Publication date: September 6, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Go Urakawa