Patents by Inventor Gowoon SEONG

Gowoon SEONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor package and method of fabricating the same
    Patent number: 9252031
    Abstract: Provided is a semiconductor package including a lower package, an interposer on the lower package, and an upper package on the interposer. The lower package may include a lower package substrate, a lower semiconductor chip on the lower package substrate, and a lower heat-transfer layer on the lower semiconductor chip. The interposer may include an interposer substrate, first and second heat-transfer openings defined by recessed bottom and top surfaces, respectively, of the interposer substrate, an upper interposer heat-transfer pad disposed in the second heat-transfer opening, and an upper heat-transfer layer disposed on the upper interposer heat-transfer pad. The upper package may include an upper package substrate, an upper package heat-transfer pad, which may be disposed in a third heat-transfer opening defined by a recessed bottom surface of the upper package substrate, and an upper semiconductor chip disposed on the upper package substrate.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: February 2, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hohyeuk Im, Jongkook Kim, Gowoon Seong, SeokWon Lee, Byoungwook Jang, Eunseok Cho
  • SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
    Publication number: 20150084170
    Abstract: Provided is a semiconductor package including a lower package, an interposer on the lower package, and an upper package on the interposer. The lower package may include a lower package substrate, a lower semiconductor chip on the lower package substrate, and a lower heat-transfer layer on the lower semiconductor chip. The interposer may include an interposer substrate, first and second heat-transfer openings defined by recessed bottom and top surfaces, respectively, of the interposer substrate, an upper interposer heat-transfer pad disposed in the second heat-transfer opening, and an upper heat-transfer layer disposed on the upper interposer heat-transfer pad. The upper package may include an upper package substrate, an upper package heat-transfer pad, which may be disposed in a third heat-transfer opening defined by a recessed bottom surface of the upper package substrate, and an upper semiconductor chip disposed on the upper package substrate.
    Type: Application
    Filed: September 23, 2014
    Publication date: March 26, 2015
    Inventors: Hohyeuk IM, JONGKOOK KIM, Gowoon SEONG, SeokWon LEE, BYOUNGWOOK JANG, EUNSEOK CHO