Patents by Inventor Godefridus A. M. Hurkx

Godefridus A. M. Hurkx has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8362821
    Abstract: An electronic device comprising a generator for generating a stream of charge carriers. The generator comprises a bipolar transistor having an emitter region, a collector region and a base region oriented between the emitter region and the collector region, and a controller for controlling exposure of the bipolar transistor to a voltage in excess of its open base breakdown voltage (BVCEO) such that the emitter region generates the stream of charge carriers from a first area being smaller than the emitter region surface area. The electronic device may further comprise a material arranged to receive the stream of charge carriers for triggering a change in a property of said material, the emitter region being arranged between the base region and the material.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: January 29, 2013
    Assignee: NXP B.V.
    Inventors: Tony Vanhoucke, Godefridus A. M. Hurkx, Jan W. Slotboom
  • Patent number: 8319546
    Abstract: A control circuit for a transistor arrangement comprises a monitoring arrangement (60) for monitoring the current flow and voltage across the transistor arrangement (50) and means (62) for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary (30) which comprises an electro-thermal instability line.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: November 27, 2012
    Assignee: NXP B.V.
    Inventors: Tony Vanhoucke, Godefridus A. M. Hurkx
  • Publication number: 20120038415
    Abstract: A control circuit for a transistor arrangement comprises a monitoring arrangement (60) for monitoring the current flow and voltage across the transistor arrangement (50) and means (62) for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary (30) which comprises an electro-thermal instability line.
    Type: Application
    Filed: January 21, 2010
    Publication date: February 16, 2012
    Applicant: NXP B.V.
    Inventors: Tony Vanhoucke, Godefridus A. M. Hurkx
  • Patent number: 7839209
    Abstract: A tunnel transistor includes source diffusion (4) of opposite conductivity type to a drain diffusion (6) so that a depletion layer is formed between source and drain diffusions in a lower doped region (8). An insulated gate (16) controls the position and thickness of the depletion layer. The device includes a quantum well formed in accumulation layer (20) which is made of a different material to the lower layer (2) and cap layer (22).
    Type: Grant
    Filed: October 3, 2007
    Date of Patent: November 23, 2010
    Assignee: NXP B.V.
    Inventors: Gilberto Curatola, Prabhat Agarwal, Jan W. Slotboom, Godefridus A. M. Hurkx, Radu Surdeanu, Gerben Doornbos
  • Publication number: 20100246249
    Abstract: The present invention discloses an electronic device comprising a generator for generating a stream (125) of charge carriers. The generator comprises a bipolar transistor (100) having an emitter region (120), a collector region (160) and a base region (140) oriented between the emitter region (120) and the collector region (160), and a controller for controlling exposure of the bipolar transistor (100) to a voltage in excess of its open base breakdown voltage (BVCEO) such that the emitter region (120) generates the stream (125) of charge carriers from a first area being smaller than the emitter region surface area. The electronic device may further comprise a material (410) arranged to receive the stream of charge carriers for triggering a change in a property of said material, the emitter region (120) being arranged between the base region (140) and the material (410).
    Type: Application
    Filed: November 12, 2008
    Publication date: September 30, 2010
    Applicant: NXP B.V.
    Inventors: Tony Vanhoucke, Godefridus A.M. Hurkx, Jan W. Slotboom
  • Patent number: 7709923
    Abstract: A metal-base transistor is suggested. The transistor comprises a first and a second electrode (2, 6) and base electrode (6) to control current flow between the first and second electrode. The first electrode (2) is made from a semiconduction material. The base electrode (3) is a metal layer deposited on top of the semiconducting material forming the first electrode. According the invention the second electrode is formed by a semiconducting nanowire (6) being in electrical contact with the base electrode (3).
    Type: Grant
    Filed: October 29, 2006
    Date of Patent: May 4, 2010
    Assignee: NXP B.V.
    Inventors: Prabhat Agarwal, Godefridus A. M. Hurkx
  • Publication number: 20100097135
    Abstract: A tunnel transistor includes source diffusion (4) of opposite conductivity type to a drain diffusion (6) so that a depletion layer is formed between source and drain diffusions in a lower doped region (8). An insulated gate (16) controls the position and thickness of the depletion layer. The device includes a quantum well formed in accumulation layer (20) which is made of a different material to the lower layer (2) and cap layer (22).
    Type: Application
    Filed: October 3, 2007
    Publication date: April 22, 2010
    Applicant: NXP, B.V.
    Inventors: Gilberto Curatola, Prabhat Agarwal, Jan W. Slotboom, Godefridus A.M. Hurkx, Radu Surdeanu
  • Patent number: 7660180
    Abstract: A thermally programmable memory has a programmable element (20) of a thermally programmable resistance preferably of phase change material, material and a blown antifuse (80) located adjacent to the programmable material. Such a blown antifuse has a dielectric layer (100) surrounded by conductive layers (90, 110) to enable a brief high voltage to be applied across the dielectric to blow a small hole in the dielectric during manufacture to form a small conductive path which can be used as a tiny electrical heater for programming the material. Due to the current confinement by the hole, the volume of the material that must be heated in order to switch to a highly-resistive state is very small. As a result the programming power can be low.
    Type: Grant
    Filed: November 24, 2005
    Date of Patent: February 9, 2010
    Assignee: NXP B.V.
    Inventors: Hans M. B. Boeve, Karen Attenborough, Godefridus A. M. Hurkx, Prabhat Agarwal, Hendrik G. A. Huizing, Michael A. A. In'T Zandt, Jan W. Slotboom
  • Publication number: 20080144355
    Abstract: A thermally programmable memory has a programmable element (20) of a thermally programmable resistance preferably of phase change material, material and a blown antifuse (80) located adjacent to the programmable material. Such a blown antifuse has a dielectric layer (100) surrounded by conductive layers (90, 110) to enable a brief high voltage to be applied across the dielectric to blow a small hole in the dielectric during manufacture to form a small conductive path which can be used as a tiny electrical heater for programming the material. Due to the current confinement by the hole, the volume of the material that must be heated in order to switch to a highly-resistive state is very small. As a result the programming power can be low.
    Type: Application
    Filed: November 24, 2005
    Publication date: June 19, 2008
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Hans M.B. Boeve, Karen Attenborough, Godefridus A.M. Hurkx, Prabhat Agarwal, Hendrik G.A. Huizing, Michael A.A. In'T Zandt, Jan W. Slotboom
  • Patent number: 6930011
    Abstract: A semiconductor device includes a preferably discrete bipolar transistor with a collector region, a base region, and an emitter region which are provided with connection conductors. A known means of preventing a saturation of the transistor is that the latter is provided with a Schottky clamping diode. The latter is formed in that case in that the connection conductor of the base region is also put into contact with the collector region. Here, the second connection conductor is exclusively connected to the base region, and a partial region of that portion of the base region which lies outside the emitter region, as seen in projection, lying below the second connection conductor is given a smaller flux of dopant atoms. The bipolar transistor is provided with a pn clamping diode which is formed between the partial region and the collector region.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: August 16, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Godefridus A. M. Hurkx, Holger Schligtenhorst, Bernd Sievers
  • Patent number: 6724021
    Abstract: A semiconductor device, such as a power MOSFET, Schottky rectifier or p-n rectifier, has a voltage-sustaining zone (20) between a first (21, 23, 31a) and second (22) device regions adjacent to respective first and second opposite surfaces (11, 12) of a semiconductor body 10. Trenched field-shaping regions (40) including a resistive path (42) extend through the voltage-sustaining zone (20) to the underlying second region (22), so as to enhance the breakdown voltage of the device. The voltage-sustaining zone (20) and the trenched field-shaping regions (40) are present in both the active device area (A) and in the peripheral area (P) of the device. A further resistive path (53) extends across the first surface (11), outwardly over the peripheral area (P). This further resistive path (53) provides a potential divider that is connected to the respective resistive paths (42) of successive underlying trenched field-shaping regions (40) in the peripheral area (P).
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: April 20, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Rob Van Dalen, Christelle Rochefort, Godefridus A. M. Hurkx
  • Patent number: 6624472
    Abstract: A semiconductor body has first and second opposed major surfaces. A first region meets the first major surface and at least one second region meets the second major surface. The semiconductor body provides a voltage-sustaining zone between the first and second regions. The voltage sustaining zone has third regions of one conductivity type interposed with fourth regions of the opposite conductivity type with the second and third regions providing a rectifying junction such that, in use, when the rectifying junction is forward biased in one mode of operation by a voltage applied between the first and second regions, a main current path is provided between the first and second major surfaces through the first region, the voltage-sustaining zone and the second region.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: September 23, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Godefridus A. M. Hurkx, Rob Van Dalen
  • Patent number: 6605862
    Abstract: A semiconductor device, such as a MOSFET or PN diode rectifier, has a p-n junction (24) between a first device region (23) and an underlying voltage-sustaining zone (20). Trenched field-shaping regions (40) extend through the voltage-sustaining zone (20) to improve the voltage-blocking and on-resistance characteristics of the device. The trenched field-shaping region (40) comprises a resistive path (42) accommodated in a trench (41) that has an insulating layer (44) at its side-walls. The insulating layer (44) dielectrically couples potential from the resistive path (42) to the voltage-sustaining zone (20) that is depleted in a voltage-blocking mode of operation of the device. The insulating layer (44) extends at the side-walls of the trench (41) to an upper level (81) that is higher than a lower level (82) at which the resistive path (42) starts in the trench (41).
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: August 12, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Rob Van Dalen, Christelle Rochefort, Godefridus A. M. Hurkx
  • Patent number: 6541817
    Abstract: In a trench-gate semiconductor device, for example a cellular power MOSFET, the gate (11) is present in a trench (20) that extends through the channel-accommodating region (15) of the device. An underlying body portion (16) that carries a high voltage in an off state of the device is present adjacent to a side wall of a lower part (20b) of the trench (20). Instead of being a single high-resistivity region, this body portion (16) comprises first regions (61) of a first conductivity type interposed with second regions (62) of the opposite second conductivity type. In the conducting state of the device, the first regions (61) provide parallel current paths through the thick body portion (16), from the conduction channel (12) in the channel-accommodating region (15). In an off-state of the device, the body portion (16) carries a depletion layer (50).
    Type: Grant
    Filed: November 29, 1999
    Date of Patent: April 1, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Godefridus A. M. Hurkx, Raymond J. E. Hueting
  • Patent number: 6462377
    Abstract: A semiconductor body (10) has first and second opposed major surfaces (10a and 10b), with a first region (11) of one conductivity type and a plurality of body regions (32) of the opposite conductivity type each forming a pn junction with the first region (11). A plurality of source regions (33) meet the first major surface (10a ) and are each associated with a corresponding body region (32) such that a conduction channel accommodating portion (33a) is defined between each source region (33) and the corresponding body region (32). An insulated gate structure (30,31) adjoins each conduction channel area (33a) for controlling formation of a conduction channel in the conduction channel areas to control majority charge carrier flow from the source regions (33) through the first region (11) to a further region (14) adjoining the second major surface (10b).
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: October 8, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Godefridus A. M. Hurkx, Rob van Dalen
  • Patent number: 6459133
    Abstract: The invention relates to a so-called punch-through diode with a mesa (12) comprising, in succession, a first (1), a second (2) and a third (3) semiconductor region (1) of, respectively, a first, a second and the first conductivity type, which punch-through diode is provided with two connection conductors (5, 6). During operation of said diode, a voltage is applied such that the second semiconductor region (2) is fully depleted. A drawback of the known punch-through diode resides in that the current flow is too large at lower voltages. In a punch-through diode according to the invention, a part (2A, 2B) of the second semiconductor region (2), which, viewed in projection, borders on the edge of the mesa (12), is provided with a larger flux of doping atoms of the second conductivity type than the remainder (2A) of the second semiconductor region (2).
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: October 1, 2002
    Assignee: Koninklijke Phillips Electronics N.V.
    Inventors: Adam R. Brown, Godefridus A. M. Hurkx, Wiebe B. De Boer, Hendrik G. A. Huizing, Eddie Huang
  • Publication number: 20020134998
    Abstract: A semiconductor device, such as a power MOSFET, Schottky rectifier or p-n rectifier, has a voltage-sustaining zone (20) between a first (21, 23, 31a) and second (22) device regions adjacent to respective first and second opposite surfaces (11, 12) of a semiconductor body 10. Trenched field-shaping regions (40) including a resistive path (42) extend through the voltage-sustaining zone (20) to the underlying second region (22), so as to enhance the breakdown voltage of the device. The voltage-sustaining zone (20) and the trenched field-shaping regions (40) are present in both the active device area (A) and in the peripheral area (P) of the device. A further resistive path (53) extends across the first surface (11), outwardly over the peripheral area (P). This further resistive path (53) provides a potential divider that is connected to the respective resistive paths (42) of successive underlying trenched field-shaping regions (40) in the peripheral area (P).
    Type: Application
    Filed: February 4, 2002
    Publication date: September 26, 2002
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Rob Van Dalen, Christelle Rochefort, Godefridus A.M. Hurkx
  • Publication number: 20020130358
    Abstract: A semiconductor device, such as a MOSFET or PN diode rectifier, has a p-n junction (24) between a first device region (23) and an underlying voltage-sustaining zone (20). Trenched field-shaping regions (40) extend through the voltage-sustaining zone (20) to improve the voltage-blocking and on-resistance characteristics of the device. The trenched field-shaping region (40) comprises a resistive path (42) accommodated in a trench (41) that has an insulating layer (44) at its side-walls. The insulating layer (44) dielectrically couples potential from the resistive path (42) to the voltage-sustaining zone (20) that is depleted in a voltage-blocking mode of operation of the device. The insulating layer (44) extends at the side-walls of the trench (41) to an upper level (81) that is higher than a lower level (82) at which the resistive path (42) starts in the trench (41).
    Type: Application
    Filed: February 7, 2002
    Publication date: September 19, 2002
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Rob Van Dalen, Christelle Rochefort, Godefridus A.M. Hurkx
  • Patent number: 6436785
    Abstract: A semiconductor device with a tunnel diode comprises two mutually adjoining semiconductor regions (2, 3) of opposed conductivity types having high enough doping concentrations to provide a tunneling junction. Portions (2A, 3A) of the semiconductor regions adjoining the junction comprise a mixed crystal of silicon and germanium. The doping concentration of both phosphorus and boron are substantially increased, given the same amount of dopants being offered as during the formation of the remainder of the regions. The tunneling efficiency is substantially improved, and also because of the reduced bandgap of said portions (2A, 3A). A much steeper current-voltage characteristic both in the forward and in the reverse direction is achieved. Thus, the tunneling pn junction can be used as a transition between two conventional diodes which are stacked one on the other and formed in a single epitaxial growing process. The doping concentration may be 6×1019 or even more than 1020 at/cm3.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: August 20, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Adam R. Brown, Godefridus A. M. Hurkx, Wiebe B. De Boer, Jan W. Slotboom
  • Patent number: 6436779
    Abstract: A semiconductor device has first and second opposed major surfaces (10a and 10b). A semiconductor first region (11) is provided between second (12 or 120) and third (14) regions such that the second region (12 or 120) forms a rectifying junction (13 or 130) with the first region (11) and separates the first region (11) from the first major surface (10a) while the third region (14) separates the first region (11) from the second major surface (10b). A plurality of semi-insulating or resistive paths (21) are dispersed within the first region (1′) such that each path extends through the first region from the second to the third region. In use of the device when a reverse biasing voltage is applied across the rectifying junction (13 or 130) an electrical potential distribution is generated along the resistive paths (21) which causes a depletion region in the first region (11) to extend through the first region (11) to the third region (14) to increase the reverse breakdown voltage of the device.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: August 20, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Godefridus A. M. Hurkx, Rob Van Dalen