Abstract: High-speed silicon CMOS circuits and high-power AlGaN/GaN amplifiers are integrated on the same wafer. A thin layer of high resistivity silicon is bonded on a substrate. Following the bonding, an AlGaN/GaN structure is grown over the bonded silicon layer. A silicon nitride or a silicon oxide layer is then deposited over the AlGaN/GaN structure. Following this, a thin layer of silicon is bonded to the silicon nitride/silicon oxide layer. An area for the fabrication of AlGaN/GaN devices is defined, and the silicon is etched away from those areas. Following this, CMOS devices are fabricated on the silicon layer and AlGaN/GaN devices fabricated on the AlGaN/GaN surface.

Abstract: A multi-layer semiconductor device utilizes the good thermal and electrical properties of a polycrystalline substrate with the electrical properties of single crystal film transferred via wafer bonding. The device structure includes a polycrystalline, e.g., silicon carbide substrate, which was polished. A planarization layer of silicon is formed on the surface, followed by chemical mechanical polishing. The substrate is then bonded to either a bulk silicon wafer or a silicon-on-insulator (SOI) wafer. The silicon (SOI) wafer is thinned to the desired thickness.

Abstract: High-speed silicon CMOS circuits and high-power AlGaN/GaN amplifiers are integrated on the same wafer. A thin layer of high resistivity silicon is bonded on a substrate. Following the bonding, an AlGaN/GaN structure is grown over the bonded silicon layer. A silicon nitride or a silicon oxide layer is then deposited over the AlGaN/GaN structure. Following this, a thin layer of silicon is bonded to the silicon nitride/silicon oxide layer. An area for the fabrication of AlGaN/GaN devices is defined, and the silicon is etched away from those areas. Following this, CMOS devices are fabricated on the silicon layer and AlGaN/GaN devices fabricated on the AlGaN/GaN surface.

Abstract: Pure silicon feedstock is melted and vaporized in a physical vapor transport furnace. In one embodiment the vaporized silicon 46 is reacted with a high purity carbon member 74, such as a porous carbon disc, disposed directly above the silicon. The gaseous species resulting from the reaction are deposited on a silicon carbide seed crystal 50 axially located above the disc, resulting in the growth of monocrystalline silicon carbide 56. In another embodiment, one or more gases, which may include a carbon-containing gas, are additionally introduced at 84 into the furnace, such as into a reaction zone above the disc, to participate in the growth process.

Abstract: Method and apparatus for growing semiconductor grade silicon carbide boules (84). Pure silicon feedstock (36) is melted and vaporized. The vaporized silicon is reacted with a high purity carbon-containing gas (64), such as propane, and the gaseous species resulting from the reaction are deposited on a silicon carbide seed crystal (50), resulting in the growth of monocrystalline silicon carbide.

Abstract: Silicon carbide wafers are prepared for semiconductor epitaxial growth by first lapping a silicon carbide wafer derived from a boule, by placing the wafer in a recess of a metal backed template and moving the wafer over and against a rotating plate. Two different diamond slurry mixtures of progressively smaller diamond grit sizes are sequentially used, along with a lubricant, for a predetermined period of time. The lapping operation is followed by a polishing operation which sequentially utilizes two different diamond slurry mixtures of progressively smaller diamond grit sizes, along with three different apertured pads sequentially applied to a rotatable plate, with the pads being of progressively softer composition. In a preferred embodiment the wafers are cleaned and the templates are changed after each new diamond slurry mixture used.

Abstract: A method of growing 4-H polytype silicon carbide crystals in a physical vapor transport system where the surface temperature of the crystal is maintained at less than about 2160.degree. C. and the pressure inside the PVT system is decreased to compensate for the lower growth temperature.