Abstract: According to one embodiment, an information processing device includes an OS and a virtual machine switching section. The OS accesses a hardware resource including a nonvolatile semiconductor memory and a semiconductor memory used as a cache memory of the nonvolatile semiconductor memory. The virtual machine switching section switches a virtual machine in exection from a first virtual machine to a second virtual machine while a cache process is executed, when cache miss in a process executed by the first virtual machine is detected.

Abstract: According to one embodiment, an information processing device includes a first determination section and a setting section. The first determination section determines inconsistency between first data and second data. The first data is stored in a nonvolatile semiconductor memory. The second data is corresponding to the first data and stored in a semiconductor memory. The setting section sets execution timing of write back based on access frequency information associated with the second data.

Abstract: According to one embodiment, an information processing device includes an OS and a virtual machine switching section. The OS accesses a hardware resource including a nonvolatile semiconductor memory and a semiconductor memory used as a cache memory of the nonvolatile semiconductor memory. The virtual machine switching section switches a virtual machine in exection from a first virtual machine to a second virtual machine while a cache process is executed, when cache miss in a process executed by the first virtual machine is detected.

Abstract: According to one embodiment, an information processing device includes a first determination section and a setting section. The first determination section determines inconsistency between first data and second data. The first data is stored in a nonvolatile semiconductor memory. The second data is corresponding to the first data and stored in a semiconductor memory. The setting section sets execution timing of write back based on access frequency information associated with the second data.

Abstract: According to one embodiment, an image processing apparatus includes a processing unit, a tessellation processing unit and a tessellation data storage unit. The processing unit performs interpolation processing on vertex data of a vector image for each sprite. The tessellation processing unit is hardware to perform tessellation processing that generates primitives based on the vertex data from the processing unit. The tessellation data storage unit stores the primitives generated by the tessellation processing unit for each sprite. The processing unit generates a rendering function to render the vector image based on the stored primitives in the tessellation data storage unit, the stored primitives is generated by rendering processing prior to the present rendering processing.

Abstract: A distributed processing device includes a GUI generating section configured to generate a job execution folder in which a program file of a program used for distributed processing and a processor file corresponding to a computational resource for executing the distributed processing are to be put and to display the job execution folder on a display device, and a file processing section configured to give an instruction for an execution of the distributed processing if the program file and the processor file which are required for executing the distributed processing are put in the job execution folder.

Abstract: A processor system includes a plurality of first processors, a temperature sensor, a main memory, and a second processor. The first processors individually process tasks. The temperature sensor measures a temperature of each of the first processors. The main memory stores programs of the tasks processed by the first processors, and a task priority order table containing a relationship between the tasks and task priority numbers. The second processor assigns the tasks to the first processors on the basis of the task priority order table and the temperatures of the first processors measured by the temperature sensor.

Abstract: A video contents display apparatus include a display generation unit for: generating a predetermined number of static images by considering a time of lapse from information about recorded video contents; converting a static image other than at least one specified static image into an image reduced in a predetermined format from the predetermined number of generated static images; and displaying a sequence of images by arranging the at least one static image and the other static image along a predetermined path on a screen by considering the time of lapse.

Abstract: A processor system includes a plurality of first processors, a temperature sensor, a main memory, and a second processor. The first processors individually process tasks. The temperature sensor measures a temperature of each of the first processors. The main memory stores programs of the tasks processed by the first processors, and a task priority order table containing a relationship between the tasks and task priority numbers. The second processor assigns the tasks to the first processors on the basis of the task priority order table and the temperatures of the first processors measured by the temperature sensor.