Abstract: A phase detector circuit for use with a multi-level signaling communication protocol on a serial communication link is disclosed. The phase detector circuit employs multiple phase and logic circuits to detect data state changes between adjacent ones of voltage levels corresponding to different data states in the communication protocol, and generates early/late signals using the detected data state changes. The phase detector circuit statistically filters data state transitions between non-adjacent voltage levels to improve phase locking and reduce recovered clock jitter.

Abstract: A voltage regulator circuit included in a computer system may include a switch device coupled between an input power supply node and a regulated power supply node. The switch device may change a value of a supply current flowing from the input power supply node and the regulated power supply node to regulate a voltage level of the regulated power supply node. A noise cancelation current may be feed forward onto a control terminal of the switch device to cancel noise on the regulated power supply node resulting from noise present on the input power supply node.

Abstract: A voltage regulator circuit included in a computer system may include a switch device coupled between an input power supply node and a regulated power supply node. The switch device may change a value of a supply current flowing from the input power supply node and the regulated power supply node to regulate a voltage level of the regulated power supply node. A noise cancelation current may be feed forward onto a control terminal of the switch device to cancel noise on the regulated power supply node resulting from noise present on the input power supply node.

Abstract: A CMUT on CMOS imaging chip is disclosed. The imaging chip can use direct connection, CMOS architecture to minimize both internal and external connection complexity. Intelligent power management can enable the chip to be used for various imaging applications with strict power constraints, including forward-looking intra-vascular ultrasound imaging. The chip can use digital logic to control transmit and receive events to minimize power consumption and maximize image resolution. The chip can be integrated into a probe, or catheter, and requires minimal external connections. The chip can comprise integrated temperature control to prevent overheating.

Abstract: Capacitive micromachined ultrasonic transducer (“CMUT”) devices and fabrication methods are provided. The CMUT devices can include integrated circuit devices utilizing direct connections to various CMOS electronic components. The use of integrated connections can reduce overall package size and improve functionality for use in ultrasonic imaging applications. CMUT devices can also be manufactured on multiple silicon chip layers with each layer connected utilizing through silicon vias (TSVs). External power connections can be provided if high biasing voltages are required. Forward and side looking CMUT arrays can be manufactured for use in a variety of ultrasound technologies.

Abstract: Capacitive micromachined ultrasonic transducer (“CMUT”) devices and fabrication methods are provided. The CMUT devices can include integrated circuit devices utilizing direct connections to various CMOS electronic components. The use of integrated connections can reduce overall package size and improve functionality for use in ultrasonic imaging applications. CMUT devices can also be manufactured on multiple silicon chip layers with each layer connected utilizing through silicon vias (TSVs). External power connections can be provided if high biasing voltages are required. Forward and side looking CMUT arrays can be manufactured for use in a variety of ultrasound technologies.

Abstract: A CMUT on CMOS imaging chip is disclosed. The imaging chip can use direct connection, CMOS architecture to minimize both internal and external connection complexity. Intelligent power management can enable the chip to be used for various imaging applications with strict power constraints, including forward-looking intra-vascular ultrasound imaging. The chip can use digital logic to control transmit and receive events to minimize power consumption and maximize image resolution. The chip can be integrated into a probe, or catheter, and requires minimal external connections. The chip can comprise integrated temperature control to prevent overheating.