Patents by Inventor Gokce Yayla

Gokce Yayla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10300152
    Abstract: Disclosed are methods, systems, and devices for implementing nanoparticles to encapsulate biomolecules such as enzymes. In one aspect, a nanoparticle device includes a shell structure including an internal layer structured to enclose a hollow interior region and include one or more holes penetrating through the internal layer, and an external layer formed of a porous material around the internal layer; and an enzyme contained within the interior region of the shell structure, the enzyme having entered the shell structure through the one or more holes and incapable of passing through the external layer, in which the pores are of a size that prevents the enzyme to pass through the pores while permitting substances smaller than the pore size to pass through the pores.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: May 28, 2019
    Assignees: The Regents of the University of California, Devacell, Inc.
    Inventors: Inanc Ortac, Sadik C. Esener, Ibrahim Gokce Yayla, Bradley Messmer
  • Publication number: 20160243262
    Abstract: Disclosed are methods, systems, and devices for implementing nanoparticles to encapsulate biomolecules such as enzymes. In one aspect, a nanoparticle device includes a shell structure including an internal layer structured to enclose a hollow interior region and include one or more holes penetrating through the internal layer, and an external layer formed of a porous material around the internal layer; and an enzyme contained within the interior region of the shell structure, the enzyme having entered the shell structure through the one or more holes and incapable of passing through the external layer, in which the pores are of a size that prevents the enzyme to pass through the pores while permitting substances smaller than the pore size to pass through the pores.
    Type: Application
    Filed: September 17, 2014
    Publication date: August 25, 2016
    Inventors: Inanc Ortac, Sadik C. Esener, Ibrahim Gokce Yayla, Bradley Messmer
  • Patent number: 5412592
    Abstract: A high capacity (1 Gbyte), high throughput (1.1 Gbyte/s) motionless-head parallel-readout optical disk, and a detector array integrated on substrate with an Si/PLZT Exclusive-NOR gate array, implement a fast retrieval (25 ms) associative memory/content addressable memory capable of 10.sup.10 bit-operations per second. The disk stores arrayed 1-D holograms, preferably computer-generated from 128.times.128 pixel images by Fourier transform. Reverse transform upon disk readout is by lenses, preferably by a single hybrid refractive/diffractive lens. The reconstituted 2-D image, or optical word, is detected and compared to an electrical data word in an fast integrated optoelectronic circuit. The circuit permits (i) a variably preset "match" detection threshold, and (ii) dynamically variable, sub-image, field size of the search. In a first mode of operation all images (or sub-images) that are sufficiently close to a preset query threshold are retrieved in one disk rotation.
    Type: Grant
    Filed: October 31, 1991
    Date of Patent: May 2, 1995
    Assignee: The Regents of the University of California
    Inventors: Ashok V. Krishnamoorthy, Philippe J. Marchand, Gokce Yayla, Sadik C. Esener
  • Patent number: 5343555
    Abstract: A pseudo-analog electronic or optoelectronic neuron stores synaptic weights as analog quantities, preferably as charges upon capacitors or upon the gates of floating gate transistors. Multiplication of a stored synaptic weight times a binary pulse-width-modulated synapse input signal periodically produces electrical charge of a first polarity on a first synapse capacitor. Meanwhile a fixed charge of opposite polarity is periodically produced at the same frequency upon another, second, synapse capacitor. The charges on both synapse capacitors at many synapses are periodically accumulated, and integrated, at a single neuron soma in the form of pulse-amplitude-modulated charge-encoded signals. This accumulation, and integration, transpires continuously progressively by a switched-capacitor technique, and during the entire duration of the input signal to each synapse. The net final result, expressed in signed electrical charge, is converted back to a PWM binary signal for transmission to further neurons.
    Type: Grant
    Filed: July 6, 1992
    Date of Patent: August 30, 1994
    Assignee: The Regents of the University of California
    Inventors: Gokce Yayla, Ashok V. Krishnamoorthy, Sadik C. Esener