Patents by Inventor Gokhan Percin

Gokhan Percin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8563345
    Abstract: A method for forming a capacitive micromachined ultrasonic transducer (CMUT) includes forming multiple CMUT elements in a first semiconductor-on-insulator (SOI) structure. Each CMUT element includes multiple CMUT cells. The first SOI structure includes a first handle wafer, a first buried layer, and a first active layer. The method also includes forming a membrane over the CMUT elements and forming electrical contacts through the first handle wafer and the first buried layer. The electrical contacts are in electrical connection with the CMUT elements. The membrane could be formed by bonding a second SOI structure to the first SOI structure, where the second SOI structure includes a second handle wafer, a second buried layer, and a second active layer. The second handle wafer and the second buried layer can be removed, and the membrane includes the second active layer.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: October 22, 2013
    Assignee: National Semiconductor Corporated
    Inventors: Steven J. Adler, Peter Johnson, Gokhan Percin, Shahram Mostafazadeh
  • Patent number: 8279409
    Abstract: The present invention provides a method for calibrating a computational model of a lithography process by calculating a demerit function using an intensity measurement at a location of a wafer; and calibrating the lithography model or a mask making model by determining values of parameters of the computational model using the calculated demerit function. The method may also use a second demerit function that is defined by the sum of squares of differences between a simulated and measured critical dimensions of a feature on the wafer.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: October 2, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Abdurrahman Sezginer, Hsu-Ting Huang, Jesus Orsely Carrero, Tatung Chow, Kostyantyn Chuyeshov, Gokhan Percin
  • Publication number: 20120187508
    Abstract: A method for forming a capacitive micromachined ultrasonic transducer (CMUT) includes forming multiple CMUT elements in a first semiconductor-on-insulator (SOI) structure. Each CMUT element includes multiple CMUT cells. The first SOI structure includes a first handle wafer, a first buried layer, and a first active layer. The method also includes forming a membrane over the CMUT elements and forming electrical contacts through the first handle wafer and the first buried layer. The electrical contacts are in electrical connection with the CMUT elements. The membrane could be formed by bonding a second SOI structure to the first SOI structure, where the second SOI structure includes a second handle wafer, a second buried layer, and a second active layer. The second handle wafer and the second buried layer can be removed, and the membrane includes the second active layer.
    Type: Application
    Filed: March 13, 2012
    Publication date: July 26, 2012
    Applicant: Texas Instruments Incorporated
    Inventors: Steven J. Adler, Peter Johnson, Gokhan Percin, Shahram Mostafazadeh
  • Patent number: 8222065
    Abstract: A method for forming a capacitive micromachined ultrasonic transducer (CMUT) is provided that includes forming oxide features outwardly of a CMUT control chip in a silicon wafer. The oxide features are planarized. A silicon-on-insulator (SOI) wafer is bonded to the planarized oxide features. For a particular embodiment, the SOI wafer comprises a single crystal epitaxial layer, a buried oxide layer and a silicon layer, and the single crystal epitaxial layer is bonded to the planarized oxide features, after which the silicon layer and the buried oxide layer of the SOI wafer are removed, leaving the single crystal epitaxial layer bonded to the oxide layer.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: July 17, 2012
    Assignee: National Semiconductor Corporation
    Inventors: Peter Smeys, Peter Johnson, Gokhan Percin
  • Patent number: 7600212
    Abstract: A method for synthesizing a photomask data set from a given target layout, including the following steps: (a) providing a set of target polygons for the target layout; (b) fitting a smooth curve to a target polygon of the set of target polygons, the curve having a set of etch-target points; (c) moving the etch target points according to a model of an etch process to produce a set of lithography-target points; and (d) synthesizing a photomask data set based on a model of a lithography process and the set of lithography-target points.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: October 6, 2009
    Assignee: Cadence Design Systems, Inc.
    Inventors: Franz X. Zach, Jesus Carrero, Bayram Yenikaya, Gokhan Percin, Xuelong Cao, Abdurrahman Sezginer
  • Patent number: 7588868
    Abstract: First and second exposures of a mask onto a wafer are performed such that the exposure field of the second exposure partially overlaps the exposure field of the first exposure. A characteristic of a set of features is determined, and a value of a parameter of an optical proximity correction model is determined. An alignment feature can be used to align a measurement tool. In yet another embodiment, pupil intensity distribution of an imaging system is measured by exposing an image field of a radiation detector with a bright feature, positioning the detector at a distance away from the image plane, and exposing the image field of the detector with a bright feature, resulting in a cumulative exposure of the image field of the detector from the two exposures. A characteristic of a spatial pattern in the cumulative exposure of the image field of the detector is then determined.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: September 15, 2009
    Assignee: Cadence Design Systems, Inc.
    Inventors: Franz X. Zach, Abdurrahman Sezginer, Gokhan Percin
  • Patent number: 7536670
    Abstract: A test mask with both verification structures and calibration structures is provided to enable the formation of an image of at least one verification structure and at least one calibration structure at a plurality of different test site locations under different dose and defocus conditions to allow the calibration structures to be measured and to obtain at least one computational model for optical proximity correction purposes.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: May 19, 2009
    Assignee: Cadence Design Systems, Inc.
    Inventors: Gökhan Perçin, Ram Ramanujam, Franz Xaver Zach
  • Patent number: 7444615
    Abstract: A method for generating an OPC model is provided which takes into consideration across-wafer variations which occur during the process of manufacturing semiconductor chips. More particularly, a method for generating an OPC model is provided which takes into consideration across-wafer variations which occur during the process of manufacturing semiconductor chips based on the parameters of test patterns measured at the “wafer sweet spots” so as to arrive at an accurate model.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: October 28, 2008
    Assignee: Invarium, Inc.
    Inventors: Gokhan Percin, Ram S. Ramanujam, Franz X. Zach, Abdurrahman Sezginer, Chi-Song Horng, Roy Prasad
  • Patent number: 7392502
    Abstract: This invention relates to a method for real time monitoring and verifying optical proximity correction (OPC) models and methods in production. Prior to OPC is performed on the integrated circuit layout, a model describing the optical, physical and chemical processes involving lithography should be obtained accurately and precisely. In general, the model is calibrated using the measurements obtained by running wafers through the same lithography, patterning, and etch processes. In this invention, a novel real time method for verifying and monitoring the calibrated model on a production or monitor wafer is presented: optical proximity corrected (OPC-ed) test and verification structures are placed on scribe lines or cut lines of the production or monitor wafer, and with pre-determined schedule, the critical dimensions and images of these test and verification structures are monitored across wafer and across exposure field.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: June 24, 2008
    Assignee: Invarium, Inc.
    Inventors: Gökhan Percin, Ram Ramanujam, Franz Xaver Zach, Koichi Suzuki
  • Publication number: 20070143733
    Abstract: A method for synthesizing a photomask data set from a given target layout, including the following steps: (a) providing a set of target polygons for the target layout; (b) fitting a smooth curve to a target polygon of the set of target polygons, the curve having a set of etch-target points; (c) moving the etch target points according to a model of an etch process to produce a set of lithography-target points; and (d) synthesizing a photomask data set based on a model of a lithography process and the set of lithography-target points.
    Type: Application
    Filed: October 2, 2006
    Publication date: June 21, 2007
    Inventors: Franz Zach, Jesus Carrero, Bayram Yenikaya, Gokhan Percin, Xuelong Cao, Abdurrahman Sezginer
  • Patent number: 7224437
    Abstract: An apparatus and method for characterizing an illumination pupil of an exposure tool comprises forming a plurality of pinhole test patterns at a plurality of test site locations to facilitate locating test pattern edges for extracting therefrom the illumination pupil characteristics of the exposure tool.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: May 29, 2007
    Assignee: Invarium, Inc
    Inventors: Gökhan Perçin, Abdurrahman Sezginer, Franz Xaver Zach
  • Publication number: 20070006116
    Abstract: This invention relates to a method for real time monitoring and verifying optical proximity correction (OPC) models and methods in production. Prior to OPC is performed on the integrated circuit layout, a model describing the optical, physical and chemical processes involving lithography should be obtained accurately and precisely. In general, the model is calibrated using the measurements obtained by running wafers through the same lithography, patterning, and etch processes. In this invention, a novel real time method for verifying and monitoring the calibrated model on a production or monitor wafer is presented: optical proximity corrected (OPC-ed) test and verification structures are placed on scribe lines or cut lines of the production or monitor wafer, and with pre-determined schedule, the critical dimensions and images of these test and verification structures are monitored across wafer and across exposure field.
    Type: Application
    Filed: June 30, 2005
    Publication date: January 4, 2007
    Inventors: Gokhan Percin, Ram Ramanujam, Franz Zach, Koichi Suzuki
  • Publication number: 20060282814
    Abstract: A test mask with both verification structures and calibration structures is provided to enable the formation of an image of at least one verification structure and at least one calibration structure at a plurality of different test site locations under different dose and defocus conditions to allow the calibration structures to be measured and to obtain at least one computational model for optical proximity correction purposes.
    Type: Application
    Filed: May 31, 2005
    Publication date: December 14, 2006
    Applicant: Invarium, Inc.
    Inventors: Gokhan Percin, Ram Ramanujam, Franz Zach
  • Publication number: 20060266243
    Abstract: A method for generating an OPC model is provided which takes into consideration across-wafer variations which occur during the process of manufacturing semiconductor chips. More particularly, a method for generating an OPC model is provided which takes into consideration across-wafer variations which occur during the process of manufacturing semiconductor chips based on the parameters of test patterns measured at the “wafer sweet spots” so as to arrive at an accurate model.
    Type: Application
    Filed: May 31, 2005
    Publication date: November 30, 2006
    Inventors: Gokhan Percin, Ram Ramanujam, Franz Zach, Abdurrahman Sezginer, Chi-Song Horng, Roy Prasad
  • Publication number: 20060268254
    Abstract: An apparatus and method for characterizing an illumination pupil of an exposure tool comprises forming a plurality of pinhole test patterns at a plurality of test site locations to facilitate locating test pattern edges for extracting therefrom the illumination pupil characteristics of the exposure tool.
    Type: Application
    Filed: May 31, 2005
    Publication date: November 30, 2006
    Applicant: Invarium, Inc.
    Inventors: Gokhan Percin, Abdurrahman Sezginer, Franz Zach
  • Publication number: 20060073686
    Abstract: First and second exposures of a mask onto a wafer are performed such that the exposure field of the second exposure partially overlaps the exposure field of the first exposure. A characteristic of a set of features is determined, and a value of a parameter of an optical proximity correction model is determined. An alignment feature can be used to align a measurement tool. In yet another embodiment, pupil intensity distribution of an imaging system is measured by exposing an image field of a radiation detector with a bright feature, positioning the detector at a distance away from the image plane, and exposing the image field of the detector with a bright feature, resulting in a cumulative exposure of the image field of the detector from the two exposures. A characteristic of a spatial pattern in the cumulative exposure of the image field of the detector is then determined.
    Type: Application
    Filed: October 22, 2004
    Publication date: April 6, 2006
    Inventors: Franz Zach, Abdurrahman Sezginer, Gokhan Percin
  • Publication number: 20030005771
    Abstract: A two-dimensional sensor array for high throughput screening of fluids in micro-machined fluid arrays is provided. The sensor array includes a two-dimensional array of piezoelectric transducers which are in contact with the back-side of the micro-machined fluid array which is opposite from the fluid positions. A means is provided to generate and detect shear or longitudinal ultrasonic waves in a time-multiplexed manner whereby the waves could propagate in either a pulse or continuous mode. A means to determine fluid parameters based on the shear and longitudinal ultrasonic waves is also provided. Furthermore, a fluid dispense system could be included which is then controlled based on the determined fluid parameters and a feedback control system. The two-dimensional micro-sensor array is compatible with and based on miniaturization technologies for high-throughput biology, such as micro-fluidics, detection, sample handling, and bioassay technology amenable to high-density formats.
    Type: Application
    Filed: June 7, 2002
    Publication date: January 9, 2003
    Inventors: Gokhan Percin, F. Levent Degertekin, Butrus T. Khuri-Yakub
  • Patent number: 6474786
    Abstract: A droplet ejector including a cylindrical reservoir closed at one end with an elastic membrane including at least one aperture. A bulk actuator at the other end for actuating the fluid for ejection through the aperture. Also disclosed is a micromachined two-dimensional array droplet ejector. The ejector includes a two-dimensional array of elastic membranes having orifices closing the ends of cylindrical fluid reservoirs. The fluid in the ejectors is bulk actuated to set up pressure waves in the fluid which cause fluid to form a meniscus at each orifice. Selective actuation of the membranes ejects droplets. In an alternative mode of operation, the bulk pressure wave has sufficient amplitude to eject droplets while the individual membranes are actuated to selectively prevent ejection of droplets.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: November 5, 2002
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Gökhan Percin, Butrus T. Khuri-Yakub
  • Patent number: 6445109
    Abstract: A transducer suitable for ultrasonic applications, fluid drop ejection and scanning force microscopy. The transducer comprises a thin piezoelectric ring bonded to a thin fully supported clamped membrane. Voltages applied to said piezoelectric ring excite axisymmetric resonant modes in the clamped membrane.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: September 3, 2002
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Gökhan Perçin, Butrus Thomas Khuri-Yakub
  • Publication number: 20010038402
    Abstract: A droplet ejector including a cylindrical reservoir closed at one end with an elastic membrane including at least one aperture. A bulk actuator at the other end for actuating the fluid for ejection through the aperture.
    Type: Application
    Filed: February 22, 2001
    Publication date: November 8, 2001
    Inventors: Gokhan Percin, Butrus T. Khuri-Yakub