Patents by Inventor Gokul Sabada

Gokul Sabada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Flip-flop with internal circuit for generating inflated low and high pulse width signals
    Patent number: 11916555
    Abstract: Example flip-flops comprise a circuit that receives a primary clock signal, generates a clock buffer signal having a series of pulses, each delayed by a set amount of time relative to a corresponding pulse of the primary clock signal, generates an intermediate clock signal based on the primary clock signal and the clock buffer signal, generates inflated low pulse width clock signals, each having a low pulse width that is greater than a low pulse width of the primary clock signal. Latch stages within example flip-flops include one or more components that are controlled by the inflated low pulse width clock signals. Example flip-flops include high-speed flip-flops and standard flip-flops. Larger circuits, such as a clock divider circuits, may incorporate multiple example high-speed flip-flops to improve performance.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: February 27, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Arnab Khawas, Badarish Subbannavar, Gokul Sabada
  • FLIP-FLOP WITH INTERNAL CIRCUIT FOR GENERATING INFLATED LOW AND HIGH PULSE WIDTH SIGNALS
    Publication number: 20230100019
    Abstract: Example flip-flops comprise a circuit that receives a primary clock signal, generates a clock buffer signal having a series of pulses, each delayed by a set amount of time relative to a corresponding pulse of the primary clock signal, generates an intermediate clock signal based on the primary clock signal and the clock buffer signal, generates inflated low pulse width clock signals, each having a low pulse width that is greater than a low pulse width of the primary clock signal. Latch stages within example flip-flops include one or more components that are controlled by the inflated low pulse width clock signals. Example flip-flops include high-speed flip-flops and standard flip-flops. Larger circuits, such as a clock divider circuits, may incorporate multiple example high-speed flip-flops to improve performance.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Inventors: Arnab Khawas, Badarish Subbannavar, Gokul Sabada