Patents by Inventor Gong Su

Gong Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110258629
    Abstract: Automated techniques are disclosed for minimizing communication between nodes in a system comprising multiple nodes for executing requests in which a request type is associated with a particular node. For example, a technique comprises the following steps. Information is maintained about frequencies of compound requests received and individual requests comprising the compound requests. For a plurality of request types which frequently occur in a compound request, the plurality of request types is associated to a same node. As another example, a technique for minimizing communication between nodes, in a system comprising multiple nodes for executing a plurality of applications, comprises the steps of maintaining information about an amount of communication between said applications, and using said information to place said applications on said nodes to minimize communication among said nodes.
    Type: Application
    Filed: May 31, 2011
    Publication date: October 20, 2011
    Applicant: International Business Machines Corporation
    Inventors: Paul M. Dantzig, Arun Kwangil Iyengar, Francis Nicholas Parr, Gong Su
  • Patent number: 7941805
    Abstract: A computer-implemented method for distributing a plurality of tasks over a plurality of processing nodes in a processor network includes the following steps: calculating a task process consumption value for the tasks; calculating a measured node processor consumption value for the nodes; calculating a target node processor consumption value for the nodes, the target node processor consumption value indicating optimal node processor consumption; calculating a load index value as a difference between the calculated node processor consumption value for a node i and the target node processor consumption value for node i; and distributing the tasks among the nodes to balance a processor workload among the nodes, according to the calculated load index value, such that the calculated load index value of each node is substantially zero.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: May 10, 2011
    Assignee: International Business Machines Corporation
    Inventors: Donna N. Dillenberger, Greg A. Dyck, Stephen J. Heisig, Bernard R. Pierce, Donald W. Schmidt, Gong Su
  • Publication number: 20110078686
    Abstract: Embodiments of the invention provide a coordinated transaction processing system capable of providing primary-primary high availability as well as minimal response time to queries via utilization of a virtual reply system between partner nodes. One or more global queues ensure peer nodes are synchronized.
    Type: Application
    Filed: September 28, 2009
    Publication date: March 31, 2011
    Applicant: International Business Machines Corporation
    Inventors: Arun K. Iyengar, Gong Su, Yanqi Wang, Yu Yuan, Jia Zou
  • Publication number: 20110078685
    Abstract: Embodiments of the invention broadly contemplate systems, methods and arrangements for processing multi-leg transactions. Embodiments of the invention process multi-leg transactions while allowing later arrived orders to get processed during the time when an earlier, tradable multi-leg transaction is pending using a look-ahead mechanism without violating any relevant timing or exchange rules.
    Type: Application
    Filed: September 28, 2009
    Publication date: March 31, 2011
    Applicant: International Business Machines Corporation
    Inventors: Arun K. Iyengar, Gong Su, Yanqi Wang, Yu Yuan, Jia Zou
  • Publication number: 20090235266
    Abstract: A method for determining status of system resources in a computer system includes loading a first operating system into a first memory, wherein the first operating system discovers system resources and reserves a number of the system resources for use of an augmenting operating system, loading the augmenting operating system into a second memory reserved for the augmenting operating system by the first operating system, accessing the first memory from the augmenting operating system and obtaining data, running a process on the augmenting operating system to perform a computation using the data obtained from the first memory, and outputting the results of the computation using the system resources reserved for the augmenting operating system.
    Type: Application
    Filed: March 12, 2008
    Publication date: September 17, 2009
    Inventors: Michel Henri Theodore Hack, Stephen John Heisig, Joshua Wilson Knight, III, Gong Su
  • Publication number: 20090037910
    Abstract: Automated techniques are disclosed for coordinating request or transaction processing in a data processing system. For example, a technique for handling compound requests, in a system comprising multiple nodes for executing requests in which an individual request is associated with a particular node, comprises the following steps. A compound request comprising at least two individual requests associated with a same node is received. It is determined if both of the at least two individual requests are executable. The compound request is executed if it is determined that all individual requests of the compound request can execute.
    Type: Application
    Filed: July 30, 2007
    Publication date: February 5, 2009
    Inventors: Paul M. Dantzig, Arun Kwangil Iyengar, Francis Nicholas Parr, Gong Su
  • Publication number: 20090037913
    Abstract: Automated techniques are disclosed for coordinating request or transaction processing in a data processing system. For example, a technique for handling requests in a data processing system comprises the following steps. A compound request comprising at least two individual requests of different types is received. An individual request r1 of the compound request is placed on a queue for requests of type t1, wherein t1 is the request type of r1. After r1 has reached the front of the queue, it is determined if at least one individual request of said compound request can execute. The compound request is executed if it is determined that all individual requests of the compound request can execute.
    Type: Application
    Filed: July 30, 2007
    Publication date: February 5, 2009
    Inventors: Paul M. Dantzig, Arun Kwangil Iyengar, Francis Nicholas Parr, Gong Su
  • Patent number: 7487279
    Abstract: A method for implementing a spin lock in a system including a plurality of processing nodes, each node including at least one processor and a cache memory, the method including steps of: acquiring exclusivity to the cache memory; checking the availability of the spin lock; setting the spin lock to logical one if the spin lock is available; setting the spin lock to logical zero once processing is complete; and explicitly yielding the cache memory exclusivity. Yielding the cache memory exclusivity includes instructing the cache coherent hardware to mark the cache memory as non-exclusive. The cache memory is typically called level two cache.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: February 3, 2009
    Assignee: International Business Machines Corporation
    Inventor: Gong Su
  • Publication number: 20080317051
    Abstract: Improved techniques are disclosed for processing transactions or requests in a data processing system. For example, a method for processing requests in a system including a plurality of nodes includes the following steps. At least two nodes of the plurality of nodes receive a plurality of requests. The two nodes exchange information to determine an order for processing requests. The two nodes process the requests in accordance with the order. The order may include a total order or a partial order.
    Type: Application
    Filed: June 22, 2007
    Publication date: December 25, 2008
    Inventors: Paul M. Dantzig, Donna N. Dillenberger, Arun Kwangil Iyengar, Francis Nicholas Parr, Gong Su
  • Publication number: 20080216087
    Abstract: A system for distributing a plurality of tasks over a plurality of nodes in a network includes: a plurality of processors for executing tasks; a plurality of nodes comprising processors; a task dispatcher; and a load balancer. The task dispatcher receives as input the plurality of tasks; calculates a task processor consumption value for the tasks; calculates a node processor consumption value for the nodes; calculates a target node processor consumption value for the nodes; and then calculates a load index value as a difference between the calculated node processor consumption for a node i and the target node processor consumption value for the node i. The balancer distributes the tasks among the nodes to balance the processor workload among the nodes according to the calculated load index value of each node, such that the calculated load index value of each node is substantially zero.
    Type: Application
    Filed: March 19, 2008
    Publication date: September 4, 2008
    Applicant: International Business Machines Corporation
    Inventors: Donna N. Dillenberger, Greg A. Dyck, Stephen J. Heisig, Bernard R. Pierce, Donald W. Schmidt, Gong Su
  • Publication number: 20080177955
    Abstract: A method for implementing a spin lock in a system including a plurality of processing nodes, each node including at least one processor and a cache memory, the method including steps of: acquiring exclusivity to the cache memory; checking the availability of the spin lock; setting the spin lock to logical one if the spin lock is available; setting the spin lock to logical zero once processing is complete; and explicitly yielding the cache memory exclusivity. Yielding the cache memory exclusivity includes instructing the cache coherent hardware to mark the cache memory as non-exclusive. The cache memory is typically called level two cache.
    Type: Application
    Filed: January 23, 2007
    Publication date: July 24, 2008
    Applicant: International Business Machines Corporation
    Inventor: Gong Su
  • Publication number: 20080178192
    Abstract: A computer-implemented method for distributing a plurality of tasks over a plurality of processing nodes in a processor network includes the following steps: calculating a task process consumption value for the tasks; calculating a measured node processor consumption value for the nodes; calculating a target node processor consumption value for the nodes, the target node processor consumption value indicating optimal node processor consumption; calculating a load index value as a difference between the calculated node processor consumption value for a node i and the target node processor consumption value for node i; and distributing the tasks among the nodes to balance a processor workload among the nodes, according to the calculated load index value, such that the calculated load index value of each node is substantially zero.
    Type: Application
    Filed: March 19, 2008
    Publication date: July 24, 2008
    Applicant: International Business Machines Corporation
    Inventors: Donna N. Dillenberger, Greg A. Dyck, Stephen J. Heisig, Bernard R. Pierce, Donald W. Schmidt, Gong Su
  • Publication number: 20080046895
    Abstract: A computer-implemented method for distributing a plurality of tasks over a plurality of processing nodes in a processor network includes the following steps: calculating a task process consumption value for the tasks; calculating a measured node processor consumption value for the nodes; calculating a target node processor consumption value for the nodes, the target node processor consumption value indicating optimal node processor consumption; calculating a load index value as a difference between the calculated node processor consumption value for a node i and the target node processor consumption value for node i; and distributing the tasks among the nodes to balance a processor workload among the nodes, according to the calculated load index value, such that the calculated load index value of each node is substantially zero.
    Type: Application
    Filed: August 15, 2006
    Publication date: February 21, 2008
    Applicant: International Business Machines Corporation
    Inventors: Donna N. Dillenberger, Greg A. Dyck, Stephen J. Heisig, Bernard R. Pierce, Donald W. Schmidt, Gong Su
  • Patent number: 5897808
    Abstract: A microwave oven includes a main body forming a cooking chamber, and a door hinged to the main body. A rear side of the door includes an endless choke groove and a sealing member surrounding the choke groove. The sealing member is biased by a spring into contact with the main body to prevent a leakage of microwaves therebetween.
    Type: Grant
    Filed: September 3, 1997
    Date of Patent: April 27, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Gong-Su Kim