Abstract: A method and apparatus for coordinating and authenticating requests for data. In one embodiment, the apparatus comprises: a baseboard management controller (BMC); and a request coordinator coupled to the BMC to intercept BMC requests and to provide intercepted requests to the BMC, where the coordination interface comprises a request parser to parse parameters for each of the BMC requests, one or more queues to store the requests while the BMC is servicing another BMC request, and a command submitter to send individual BMC requests to the BMC, wherein the BMC is operable to generate the responses to the BMC requests received from the coordination interface and to send the responses to the coordination interface.

Abstract: According to some embodiments, power information associated with a computing system may be monitored. Based on the monitored power information, it may be determined whether a hardware memory throttling signal will be asserted and/or that a processor power control signal will be asserted.

Abstract: According to some embodiments, power information associated with a computing system may be monitored. Based on the monitored power information, it may be determined whether a hardware memory throttling signal will be asserted and/or that a processor power control signal will be asserted.

Abstract: An energy efficient power supply system is disclosed. The energy efficient power supply system comprises a plurality of power supply units and the power supply system may be coupled to the control logic. The control logic may be coupled to the power monitor unit. The power monitor unit may determine a power consumption value, which may represent power requirement of a power consuming system such as a computer system. The control logic may determine the power supply units of the plurality of power supply units that are to be activated to provide power to match the power requirement. The control logic may identify the power supply units that may be activated to operate at a maximum efficiency value while providing power specified by the power consumption value.

Abstract: Methods and arrangements to establish power rails for a computer system in accordance with a sequence requirement are disclosed. Embodiments may interconnect voltage regulators for components of a platform in accordance with a sequence requirement for establishing power rails for proper operation of the platform. The voltage regulators may comprise enable inputs for enabling the establishment of power rails and power good signal outputs to indicate establishment of power rails. Some embodiments include interconnections to couple voltage regulators in a series of stages. Power good signals output by voltage regulators in one stage may enable inputs of voltage regulators in a subsequent stage. In many embodiments, such interconnections advantageously implement power sequence requirements with little or no need for glue logic and/or programmable logic devices, reducing costs and space requirements associated with implementing the power sequence. Other embodiments are disclosed and claimed.

Abstract: A system may include a motherboard, a chipset coupled to the motherboard, a memory module mount coupled to the chipset, a power transistor electrically coupled to the memory module mount, a voltage regulator to provide power to the power transistor, and an I/O expander coupled to the motherboard. The I/O expander is to receive instructions from the chipset to selectively control the power transistor to provide the power to the memory module mount.

Abstract: In some embodiments, an circuit card includes an electronic circuit substrate, a ground plane on the electronic circuit substrate, first and second differential signal pads on the electronic circuit substrate, a ground return signal pad associated with the first and second differential signal pads, the ground return signal pad being connected to the ground plane on the electronic substrate, and a cutout structure on the ground plane positioned near a location where the ground return signal pad connects to the ground plane, wherein the cutout structure is configured to direct a ground return path associated with the first and second differential signal pads to the ground return signal pad associated with the first and second differential signal pads. Other embodiments are disclosed and claimed.

Abstract: Methods and arrangements to establish power rails for a computer system in accordance with a sequence requirement are disclosed. Embodiments may interconnect voltage regulators for components of a platform in accordance with a sequence requirement for establishing power rails for proper operation of the platform. The voltage regulators may comprise enable inputs for enabling the establishment of power rails and power good signal outputs to indicate establishment of power rails. Some embodiments include interconnections to couple voltage regulators in a series of stages. Power good signals output by voltage regulators in one stage may enable inputs of voltage regulators in a subsequent stage. In many embodiments, such interconnections advantageously implement power sequence requirements with little or no need for glue logic and/or programmable logic devices, reducing costs and space requirements associated with implementing the power sequence. Other embodiments are disclosed and claimed.

Abstract: A system may include a motherboard, a chipset coupled to the motherboard, a memory module mount coupled to the chipset, a power transistor electrically coupled to the memory module mount, a voltage regulator to provide power to the power transistor, and an I/O expander coupled to the motherboard. The I/O expander is to receive instructions from the chipset to selectively control the power transistor to provide the power to the memory module mount.