Patents by Inventor Goran Magerl

Goran Magerl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTEGRATION VERIFICATION SYSTEM
    Publication number: 20140100837
    Abstract: A verification system for an integrated device includes a plurality of detailed subsystem virtual prototypes, a plurality of fast subsystem virtual prototypes, and a test controller. The plurality of detailed system virtual prototypes include simulation information for core functionality of subsystems of the device. The plurality of fast system level prototypes include simulation information to facilitate overall functionality of the combined subsystems of the device.
    Type: Application
    Filed: October 8, 2012
    Publication date: April 10, 2014
    Inventors: Stefan Heinen, Juergen Brock, Sindhura Radhakrishnan, Rajshekhar N. Paragond, Shrinivas Rao K. Gowde, Ragu T. Ramachandrarao, Jonas Hoelscher, Goran Magerl