Abstract: This document discusses, among other things, systems and methods for programming a neuromodulation therapy to treat neurological or cardiovascular diseases. A system includes an ambulatory medical device (AMD) and at least one computer-readable storage medium including instructions executable on an external system. The instructions, when executed by the external system, causes a user interface in the external system to receive a waveform function and one or more modulation parameter values. The waveform function includes one or more modulation programs characterized by one or more modulation parameters. The instructions causes a compiler to translate the waveform function into virtual machine (VM) instructions, which can be transmitted to the AMD. The AMD includes a VM that executes the VM instructions, and generates one or more modulation waveform datasets. The AMD may generate and deliver electrostimulation therapy in accordance with the one or more modulation waveform datasets.

Abstract: This document discusses, among other things, systems and methods for programming neuromodulation therapy to treat neurological or cardiovascular diseases. A system includes an input circuit that receives a modulation magnitude representing a level of stimulation intensity, a memory that stores a plurality of gain functions associated with a plurality of modulation parameters, and a electrostimulator that may generate and deliver an electrostimulation therapy. A controller may program the electrostimulator with the plurality of modulation parameters based on the received modulation magnitude and the plurality of gain functions, and control the electrostimulator to generate electrostimulation therapy according to the plurality of modulation parameters.

Abstract: Temperature sensing circuitry for an Implantable Medical Device (IMD) is disclosed that can be integrated into integrated circuitry in the IMD and draws very little power, thus enabling continuous temperature monitoring without undue battery depletion. Temperature sensor and threshold setting circuitry produces analog voltage signals indicative of a sensed temperature and at least one temperature threshold. Such circuitry employs a Ptat current reference stage and additional stages, which stages contains resistances that are set based on the desired temperature threshold(s) and to set the voltage range of the sensed temperature. These analog voltages are received at temperature threshold detection circuitry, which produces digital signal(s) indicating whether the sensed temperature has passed the temperature threshold(s). The digital signal(s) are then provided to digital circuitry in the IMD, where they can be stored as a function of time for later review, or used to immediately to control IMD operation.

Abstract: Digital-to-analog converter (master DAC) circuitry is disclosed that is programmable to set a controlled slew rate for pulses that are otherwise defined as having sharp amplitude transitions. For example, when producing a biphasic pulse, the constant amplitude and duration of first and second pulses phases can be defined and provided to the DAC in traditional fashion. Slew rate control signals control a slew rate DAC within the master DAC, which prescribes a slew rate that will appear at sharp transitions of the defined biphasic pulses, i.e., at the beginning of the first phase, at the transition from the first to the second phase, and at the end of the second phase. The slew rate can vary with the duration or frequency of the pulses, with lower slew rates used with longer durations and/or lower frequencies, and with higher slew rates used with shorter durations and/or higher frequencies.

Abstract: Battery management circuitry for an implantable medical device such as an implantable neurostimulator is described. The circuitry has a T-shape with respect to the battery terminal, with charging circuitry coupled between rectifier circuitry and the battery terminal on one side of the T, and load isolation circuitry coupled between the load and the battery terminal on the other side. The load isolation circuitry can comprise two switches wired in parallel. An undervoltage fault condition opens both switches to isolate the battery terminal from the load to prevent further dissipation of the battery. Other fault conditions will open only one the switches leaving the other closed to allow for reduced power to the load to continue implant operations albeit at safer low-power levels. The battery management circuitry can be fixed in a particular location on an integrated circuit which also includes for example the stimulation circuitry for the electrodes.

Abstract: Timing channel circuitry for controlling stimulation circuitry in an implantable stimulator is disclosed. The timing channel circuitry comprises a addressable memory. Data for the various phases of a desired pulse are stored in the memory using different numbers of words, including a command indicative of the number of words in the phase, a next address for the next phase stored in the memory, and a pulse width or duration of the current phase, control data for the stimulation circuitry, pulse amplitude, and electrode data. The command data is used to address through the words in the current phase via the address bus, which words are sent to a control register for the stimulation circuitry. After the duration of the pulse width for the current phase has passed, the stored next address is used to access the data for the next phase stored in the memory.

Abstract: An implantable pulse generator (IPG) is disclosed having a plurality of electrode nodes, each electrode node configured to be coupled to an electrode to provide stimulation pulses to a patient's tissue. The IPG includes a digital-to-analog converter configured to amplify a reference current to a first current specified by first control signals; a first resistance configured to receive the first current, wherein a voltage across the first resistance is held to a reference voltage at a first node; a plurality of branches each comprising a second resistance and configured to produce a branch current, wherein a voltage across each second resistance is held to the reference voltage at second nodes; and a switch matrix configurable to selectively couple any branch current to any of the electrode nodes via the second nodes.

Abstract: An architecture is disclosed for an Implantable Pulse Generator having improved compliance voltage monitoring and adjustment software and hardware. Software specifies which stimulation pulses are to be measured as relevant to monitoring and adjusting the compliance voltage. Preferably, specifying such pulses occurs by setting a compliance monitoring instruction (e.g., a bit) in the program that defines the pulse, and the compliance monitor bit instruction may be set at a memory location defining a particular pulse phase during which the compliance voltage should be monitored. When a compliance monitor instruction issues, the active electrode node voltages are monitored and compared to desired ranges to determine whether they are high or low. Compliance logic operates on these high/low signals and processes them to decide whether to issue a compliance voltage interrupt to the microcontroller, which can then command the compliance voltage generator to increase or decrease the compliance voltage.

Abstract: Digital-to-analog converter (DAC) circuitry for providing currents at electrodes of an Implantable Pulse Generator (IPG) is disclosed. The DAC circuitry includes at least one PDAC for sourcing current to the electrodes, and at least one NDAC for sinking current from the electrodes. The PDACs are powered with power supplies VH (the compliance voltage) and Vssh in a high power domain, and the NDACs are powered with power supplies Vcc and ground in a low power domain. VH may change during IPG operation, and Vssh preferably also changes with a fixed difference with respect to VH. Digital control signals to the PDACs are formed (and possibly converted into) the high power domain, and transistors used to build the PDACs are biased in the high power domain, and thus may also change with VH. This permits transistors in the PDACs and NDACs to be made from normal low-voltage logic transistors.

Abstract: An implantable pulse generator (IPG) for an implantable medical device is disclosed herein. The IPG is capable of sensing the presence of an external magnetic field, such as a magnetic field associated with magnetic resonance imaging (MRI). The IPG includes a circuit that contains a magnetic core inductor and that is configured to boost a first voltage to a second voltage and use the second voltage to drive a current through a load. In a strong magnetic field, the magnetic core of the inductor becomes magnetically saturated, causing the inductance of the inductor to sharply drop. The inductance drop can be detected, for example, by detecting an increase in the second voltage. The circuit may be a boost converter circuit used to provide a compliance voltage for operation of the IPG.

Abstract: Current generation circuitry for an Implantable Pulse Generator (IPG) is disclosed. The IPG comprises a plurality of PDACs and NDACs for souring currents to electrode nodes. The PDACs and NDACs can be configured as pairs to each provide stimulation in independent timing channels, or the PDACs can be combined and the NDACs can be combined to provide stimulation in a single timing channel. Further, the PDAC or NDAC can provide a plurality of source branch currents each of the same amplitude to the electrodes via a switch matrix, and pulse definition circuitry can be configured to always connect each of the source branch currents to one of the first one or more electrode nodes via the switch matrix.

Abstract: Improved circuitry for measuring analog values in an implantable pulse generator is disclosed. The measurement circuitry executes instructions that define the timing and parameters of measurements to be taken. The instructions include instructions that are responsive to different types of triggers issued by different pulse definition circuits, which pulse definition circuits generate different stimulation waveforms at different groups of electrodes. The measurement circuitry is configurable to update the groups of electrodes used to deliver stimulation.

Abstract: Improved stimulation circuitry for controlling the stimulation delivered by an implantable stimulator is disclosed. The stimulation circuitry includes memory circuitry that stores pulse programs that define pulse shapes, steering programs that define electrode configurations, and aggregate programs that link a selected pulse program with a selected steering program. Each steering program defines the stimulation polarity and the allocation of current of the specified stimulation polarity for each of the pulse generator's electrodes. Each pulse program includes one or more pulse instructions, where each instruction defines the parameters of a single phase of the pulse program. Pulse definition circuits in the stimulation circuitry execute aggregate programs to generate stimulation waveforms, which stimulation waveforms can be generated simultaneously by the different pulse definition circuits.

Abstract: Improved stimulation circuitry for controlling the stimulation delivered by an implantable stimulator is disclosed. The stimulation circuitry includes memory circuitry that stores pulse programs that define pulse shapes, steering programs that define electrode configurations, and aggregate programs that link selected pulse programs with selected steering programs. Each aggregate program is formed from multiple aggregate instructions. The amplitude of pulses defined by an aggregate instruction can be gradually increased to a full value over a specified number of steps and with a specified number of pulses at each step. Different step number and pulses per step can be defined for the first aggregate instruction and succeeding aggregate instructions.

Abstract: Improved stimulation circuitry for controlling the stimulation delivered by an implantable stimulator is disclosed. The stimulation circuitry includes memory circuitry that stores pulse programs that define pulse shapes, steering programs that define electrode configurations, and aggregate programs that link a selected pulse program with a selected steering program. Each steering program defines the stimulation polarity and the allocation of current of the specified stimulation polarity for each of the pulse generator's electrodes. Each pulse program includes one or more pulse instructions, where each instruction defines the parameters of a single phase of the pulse program. Pulse definition circuits in the stimulation circuitry execute aggregate programs to generate stimulation waveforms, which stimulation waveforms can be generated simultaneously by the different pulse definition circuits.

Abstract: Recovery circuitry for passively recovering charge from capacitances at electrodes in an Implantable Pulse Generator (IPG) is disclosed. The passive recovery circuitry includes passive recovery switches intervening between each electrode node and a common reference voltage, and each switch is in series with a variable resistance that may be selected based on differing use models of the IPG. The passive recovery switches may also be controlled in different modes. For example, in a first mode, the only recovery switches closed after a stimulation pulse are those associated with electrodes used to provide stimulation. In a second mode, all recovery switches are closed after a stimulation pulse, regardless of the electrodes used to provide stimulation. In a third mode, all recovery switches are closed continuously, which can provide protection when the IPG is in certain environments (e.g., MRI), and which can also be used during stimulation therapy itself.

Abstract: An algorithm programmed into the control circuitry of a rechargeable-battery Implantable Medical Device (IMD) is disclosed that can quantitatively forecast and determine the timing of an early replacement indicator (tEOLi) and an IMD End of Life (tEOL). These forecasts and determinations of tEOLi and tEOL occur in accordance with one or more parameters having an effect on rechargeable battery capacity, such as number of charging cycles, charging current, discharge depth, load current, and battery calendar age. The algorithm consults such parameters as stored over the history of the operation of the IMD in a parameter log, and in conjunction with a battery capacity database reflective of the effect of these parameters on battery capacity, determines and forecasts tEOLi and tEOL. Such forecasted or determined values may also be used by a shutdown algorithm to suspend therapeutic operation of the IMD.

Abstract: Battery management circuitry for an implantable medical device such as an implantable neurostimulator is described. The circuitry has a T-shape with respect to the battery terminal, with charging circuitry coupled between rectifier circuitry and the battery terminal on one side of the T, and load isolation circuitry coupled between the load and the battery terminal on the other side. The load isolation circuitry can comprise two switches wired in parallel. An undervoltage fault condition opens both switches to isolate the battery terminal from the load to prevent further dissipation of the battery. Other fault conditions will open only one the switches leaving the other closed to allow for reduced power to the load to continue implant operations albeit at safer low-power levels. The battery management circuitry can be fixed in a particular location on an integrated circuit which also includes for example the stimulation circuitry for the electrodes.

Abstract: Circuitry for generating a compliance voltage (V+) for the current sources and/or sinks in an implantable stimulator device in disclosed. The circuitry assesses whether V+ is optimal for a given pulse, and if not, adjusts V+ for the next pulse. The circuitry uses amplifiers to measure the voltage drop across active PDACs (current sources) and NDAC (current sinks) at an appropriate time during the pulse. The measured voltages are assessed to determine whether they are high or low relative to optimal values. If low, a V+ regulator is controlled to increase V+ for the next pulse; if not, the V+ regulator is controlled to decrease V+ for the next pulse. Through this approach, gradual changes that may be occurring in the implant environment can be accounted for, with V+ adjusted on a pulse-by-pulse basis to keep the voltage drops at or near optimal levels for efficient DAC operation.

Abstract: A rechargeable-battery Implantable Medical Device (IMD) is disclosed including a primary battery which can be used as a back up to power critical loads in the IMD when the rechargeable battery is undervoltage and other non-critical loads are thus decoupled from the rechargeable battery. A rechargeable battery undervoltage detector provides at least one rechargeable battery undervoltage control signal to a power supply selector, which is used to set the power supply for the critical loads either to the rechargeable battery voltage when the rechargeable battery is not undervoltage, or to the primary battery voltage when the rechargeable battery is undervoltage. Circuitry for detecting the rechargeable battery undervoltage condition may be included as part of the critical loads, and so the undervoltage control signal(s) is reliably generated in a manner to additionally decouple the rechargeable battery from the load to prevent further rechargeable battery depletion.