Patents by Inventor Gord G. Rabjohn

Gord G. Rabjohn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bias circuit for depletion mode field-effect transistors
    Patent number: 6304130
    Abstract: The present invention relates to a bias circuit for biasing a depletion mode power transistor. The bias circuit includes a voltage offset circuit and a transistor, where the voltage offset circuit is serially coupled between the gate terminal of the depletion mode power transistor and the drain terminal of the transistor. The bias circuit generates a bias voltage that, when applied to the gate terminal of the depletion mode power transistor, maintains a substantially constant drain current through the power transistor over a range of threshold voltages caused by process and temperature variations.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: October 16, 2001
    Assignee: Nortel Networks Limited
    Inventors: Darcy Poulin, Gord G. Rabjohn, Somsack Sychaleun