Patents by Inventor Gordhan Barevadia

Gordhan Barevadia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Mechanism to enhance observability of integrated circuit failures during burn-in tests
    Patent number: 7120842
    Abstract: A system and method enhance observability of IC failures during burn-in tests. Scan automatic test pattern generation and memory built-in self-test patterns are monitored during the burn-in tests to provide a mechanism for observing selective scan chain outputs and memory BIST status outputs.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: October 10, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Gordhan Barevadia, Anupama Aniruddha Agashe, Nikila Krishnamoorthy, Rubin Ajit Parekhji, Neil J. Simpson
  • Mechanism to enhance observability of integrated circuit failures during burn-in tests
    Publication number: 20050066243
    Abstract: A system and method enhance observability of IC failures during burn-in tests. Scan automatic test pattern generation and memory built-in self-test patterns are monitored during the burn-in tests to provide a mechanism for observing selective scan chain outputs and memory BIST status outputs.
    Type: Application
    Filed: September 22, 2003
    Publication date: March 24, 2005
    Inventors: Gordhan Barevadia, Anupama Agashe, Nikila Krishnamoorthy, Rubin Parekhji, Neil Simpson