Abstract: A water jacket for a cylinder head of an internal combustion engine includes a coolant chamber arranged to permit the flow of coolant within the water jacket and a coolant conduit positioned to permit the flow of coolant proximate to a recess for receiving an exhaust valve mounted to the cylinder head. The coolant conduit is in fluid communication with the coolant chamber, and the coolant conduit is shaped as a complex curve. A water jacket includes a pair of apertures arranged to receive a spark plug and a fuel injector. The apertures are separated by a separating member, and a coolant chamber is arranged to permit the flow of coolant about the apertures. The separating member includes a coolant channel in fluid communication with the coolant chamber so as to permit the flow of coolant between the apertures.

Abstract: A cylinder head assembly for an internal combustion engine including a cylinder head, a water jacket mountable to said cylinder head, and a fuel injector and a spark plug mountable in the water jacket so as to extend through the cylinder head and into a corresponding combustion chamber. The spark plug and fuel injector are mountable along either a first or second axis, and the cylinder head has an injector recess shaped to receive the spark plug and the injector along both first and second axes.

Abstract: A water jacket for a cylinder head of an internal combustion engine includes a coolant chamber arranged to permit the flow of coolant within the water jacket and a coolant conduit positioned to permit the flow of coolant proximate to a recess for receiving an exhaust valve mounted to the cylinder head. The coolant conduit is in fluid communication with the coolant chamber, and the coolant conduit is shaped as a complex curve. A water jacket includes a pair of apertures arranged to receive a spark plug and a fuel injector. The apertures are separated by a separating member, and a coolant chamber is arranged to permit the flow of coolant about the apertures. The separating member includes a coolant channel in fluid communication with the coolant chamber so as to permit the flow of coolant between the apertures.

Abstract: The present invention relates to an adjustable camshaft (1), which is connected to a crankshaft via a sprocket/belt pulley (3) and has a phase adjusting device (4) for adjusting the phase between the camshaft (1) and the crankshaft. The essential idea of the invention is that the phase adjusting device (4) comprises a planetary gear (5) having at least two sun wheels (6 and 7) disposed coaxially to each other and planet wheels (8) surrounding said sun wheels, wherein said planet wheels are rotatably supported on a planet wheel carrier (10) via a planet wheel axis (9). Said planet wheel carrier (10) can be rotated in relation to the camshaft axis (11), wherein a rotation of the planet wheel carrier (10) brings about a phase adjustment between the camshaft (1) and the drive.

Abstract: A processing system includes a memory and a first core configured to process applications. The first core includes a first cache. The processing system includes a mechanism configured to capture a sequence of addresses of the application that miss the first cache in the first core and to place the sequence of addresses in a storage array; and a second core configured to process at least one software algorithm. The at least one software algorithm utilizes the sequence of addresses from the storage array to generate a sequence of prefetch addresses. The second core issues prefetch requests for the sequence of the prefetch addresses to the memory to obtain prefetched data and the prefetched data is provided to the first core if requested.

Abstract: A processing system includes a memory and a first core configured to process applications. The first core includes a first cache. The processing system includes a mechanism configured to capture a sequence of addresses of the application that miss the first cache in the first core and to place the sequence of addresses in a storage array; and a second core configured to process at least one software algorithm. The at least one software algorithm utilizes the sequence of addresses from the storage array to generate a sequence of prefetch addresses. The second core issues prefetch requests for the sequence of the prefetch addresses to the memory to obtain prefetched data and the prefetched data is provided to the first core if requested.

Abstract: The decision within a packet processing device to transmit a newly arriving packet into a queue to await further processing or to discard the same packet is made by a flow control method and system. The flow control is updated with a constant period determined by storage and flow rate limits. The update includes comparing current queue occupancy to a threshold. The outcome of the update is adjustment up or down of the transmit probability value. The value is stored for the subsequent period of flow control and packets arriving during that period are subject to a transmit or discard decision that uses that value.

Abstract: A method for increasing the capacity of a connection table in a firewall accelerator by means of mapping packets in one session with some common security actions into one table entry. For each of five Network Address Translation (NAT) configurations, a hash function is specified. The hash function takes into account which of four possible arrival types a packet at a firewall accelerator may have. When different arrival types of packets in the same session are processed, two or more arrival types may have the same hash value.

Abstract: Computers are caused to provide a hash table wherein each entry is associated with a binary key and indexed by a selected portion of a hash value of the associated key, and points to a data structure location for storing non-selected portions of, or the entire hash value of, the binary key, and action data corresponding to the value of the binary key. Content addressable memory entries store a binary key, or a value unique to it, and an association to a corresponding action. Pointers to the data structure use selected portions of binary key hash values as an index when not selected portions of hash values of other binary keys, and associations are established between CAM entry and associated data structure locations when selected portions of the hash values of the binary keys are the same as selected portions of hash values of one or more other binary keys.

Abstract: The page table walker is moved from its conventional location in the memory management unit associated with the data processor to a location in main memory i.e. the main memory controller. As a result, an implementation is provided wherein the processing of requests for data could selectively avoid or bypass cumbersome caches associated with the data processor.

Abstract: A mechanism controls a multi-thread processor so that when a first thread encounters a latency event for a first predefined time interval temporary control is transferred to an alternate execution thread for duration of the first predefined time interval and then back to the original thread. The mechanism grants full control to the alternate execution thread when a latency event for a second predefined time interval is encountered. The first predefined time interval is termed short latency event whereas the second time interval is termed long latency event.

Abstract: Systems and methods for distributing thread instructions in the pipeline of a multi-threading digital processor are disclosed. More particularly, hardware and software are disclosed for successively selecting threads in an ordered sequence for execution in the processor pipeline. If a thread to be selected cannot execute, then a complementary thread is selected for execution.

Abstract: A method and system for identifying a data structure associated with a packet of data. A processor internal to a packet processor may extract one or more fields in a packet header field of a received packet of data to generate a search key. The internal processor may then be configured to select which table, e.g., routing table, quality of service table, filter table, needs to be accessed using the search key in order to process the received packet of data. A determination may then be made by the internal processor as to whether a CAM or a hash table and a Patricia Tree are used to identify the data structure associated with the received packet of data. Based on table definitions in a register, the internal processor may make such a determination.

Abstract: A method and system for identifying sessions in a computer network is disclosed. The session is between a first computer system and a second computer system. The session consists of an exchange of a plurality of packets between the computer systems. Each of the packets includes source information and destination information relating to the first computer system and the second computer system. The method and system include providing a symmetric key and identifying the session using the symmetric key. The symmetric key is provided utilizing a manipulation of the source information and the destination information. The symmetric key is associated with the plurality of packets traveling between the first computer system and the second computer system.

Abstract: A method and structure is disclosed for dispatching appropriate data to a network processing system comprising an improved technique for extracting protocol header fields for use by the network processor. This technique includes basic classification of a packet according to the types of protocol headers present in the packet. Based on the results of the classification, specific parameter fields are extracted from corresponding headers. All such parameter fields from one or more protocol headers in the packet are concatenated into a compressed dispatch message. Multiple of such dispatch messages are bundled into a single composite dispatch message. Thus selected header fields from N packets are passed to the network processor in a single composite dispatch message, increasing the network processor's packet forwarding capacity by a factor of N. Likewise, multiple enqueue messages are bundled into a single composite enqueue message to direct enqueue and frame alterations to be taken on the bundle of N packets.

Abstract: A page table mechanism translates virtual addresses to real addresses. In a first aspect, page table entries are contained in equal-sized blocks, the entries within each block corresponding to contiguous pages of virtual address space. Preferably, the common high-order portion of the virtual address is contained in segments distributed among multiple page table entries of the block. In a second aspect, the virtual address indexes a binary tree definitional structure. Decode logic traverses a binary tree defined by the definitional structure by testing selective bits of the virtual address to reach a leaf of the binary tree, which defines the location of data defining the real address.

Abstract: A method for increasing the capacity of a connection table in a firewall accelerator by means of mapping packets in one session with some common security actions into one table entry. For each of five Network Address Translation (NAT) configurations, a hash function is specified. The hash function takes into account which of four possible arrival types a packet at a firewall accelerator may have. When different arrival types of packets in the same session are processed, two or more arrival types may have the same hash value.

Abstract: A method and system for encoding a set of range labels for each parameter field in a packet classification key in such a way as to require preferably only a single entry per rule in a final processing stage of a packet classifier. Multiple rules are sorted accorded to their respective significance. A range, based on a parameter in the packet header, is previously determined. Multiple rules are evaluated according to an overlapping of rules according to different ranges. Upon a determination that two or more rules overlap, each overlapping rule is expanded into multiple unique segments that identify unique range intersections. Each cluster of overlapping ranges is then offset so that at least one bit in a range for the rule remains unchanged. The range segments are then converted from binary to Gray code, which results in the ability to determine a CAM entry to use for each range.

Abstract: A method for increasing the capacity of a connection table in a firewall accelerator by means of mapping packets in one session with some common security actions into one table entry. For each of five Network Address Translation (NAT) configurations, a hash function is specified. The hash function takes into account which of four possible arrival types a packet at a firewall accelerator may have. When different arrival types of packets in the same session are processed, two or more arrival types may have the same hash value.

Abstract: A method and structure are disclosed for dispatching appropriate data to a network processing system comprising an improved technique for extracting protocol header fields for use by the network processor. This technique includes basic classification of a packet according to the types of protocol headers present in the packet. Based on the results of the classification, specific parameter fields are extracted from corresponding headers. All such parameter fields from one or more protocol headers in the packet are concatenated into a compressed dispatch message. Multiples of such dispatch messages are bundled into a single composite dispatch message. Thus, selected header fields from N packets are passed to the network processor in a single composite dispatch message, increasing the network processor's packet forwarding capacity by a factor of N.