Patents by Inventor Gordon Kuo

Gordon Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9472714
    Abstract: Provided is a method of fabricating a light-emitting diode (LED) device. A wafer is provided. The wafer has a sapphire substrate and a semiconductor layer formed on the sapphire substrate. The semiconductor layer contains a plurality of un-separated LED dies. A photo-sensitive layer is formed over the semiconductor layer. A photolithography process is performed to pattern the photo-sensitive layer into a plurality of patterned portions. The patterned portions are separated by a plurality of openings that are each substantially aligned with one of the LED dies. A metal material is formed in each of the openings. The wafer is radiated in a localized manner such that only portions of the wafer that are substantially aligned with the openings are radiated. The sapphire substrate is removed along with un-radiated portions of the semiconductor layer, thereby separating the plurality of LED dies into individual LED dies.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: October 18, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Gordon Kuo
  • Publication number: 20150140703
    Abstract: An apparatus includes a wafer with a number of openings therein. For each opening, an LED device is coupled to a conductive carrier and the wafer in a manner so that each of the coupled LED device and a portion of the conductive carrier at least partially fill the opening. A method of fabricating an LED device includes forming a number of openings in a wafer. The method also includes coupling light-emitting diode (LED) devices to conductive carriers. The LED devices with conductive carriers at least partially fill each of the openings.
    Type: Application
    Filed: January 23, 2015
    Publication date: May 21, 2015
    Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Gordon Kuo, Chyi Shyuan Chern
  • Publication number: 20150093844
    Abstract: Provided is a method of fabricating a light-emitting diode (LED) device. A wafer is provided. The wafer has a sapphire substrate and a semiconductor layer formed on the sapphire substrate. The semiconductor layer contains a plurality of un-separated LED dies. A photo-sensitive layer is formed over the semiconductor layer. A photolithography process is performed to pattern the photo-sensitive layer into a plurality of patterned portions. The patterned portions are separated by a plurality of openings that are each substantially aligned with one of the LED dies. A metal material is formed in each of the openings. The wafer is radiated in a localized manner such that only portions of the wafer that are substantially aligned with the openings are radiated. The sapphire substrate is removed along with un-radiated portions of the semiconductor layer, thereby separating the plurality of LED dies into individual LED dies.
    Type: Application
    Filed: December 11, 2014
    Publication date: April 2, 2015
    Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Gordon Kuo
  • Patent number: 8912033
    Abstract: Provided is a method of fabricating a light-emitting diode (LED) device. The method includes providing a substrate having opposite first and second sides. A semiconductor layer is formed on the first side of the substrate. The method includes forming a photoresist layer over the semiconductor layer. The method includes patterning the photoresist layer into a plurality of photoresist components. The photoresist components are separated by openings. The method includes filling the openings with a plurality of thermally conductive components. The method includes separating the semiconductor layer into a plurality of dies using a radiation process that is performed to the substrate from the second side. Each of the first regions of the substrate is aligned with one of the conductive components.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: December 16, 2014
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Gordon Kuo
  • Publication number: 20130230935
    Abstract: An apparatus includes a wafer with a number of openings therein. For each opening, an LED device is coupled to a conductive carrier and the wafer in a manner so that each of the coupled LED device and a portion of the conductive carrier at least partially fill the opening. A method of fabricating an LED device includes forming a number of openings in a wafer. The method also includes coupling light-emitting diode (LED) devices to conductive carriers. The LED devices with conductive carriers at least partially fill each of the openings.
    Type: Application
    Filed: April 8, 2013
    Publication date: September 5, 2013
    Inventors: HSING-KUO HSIA, Chih-Kuang Yu, Gordon Kuo, Chyi Shyuan Chem
  • Patent number: 8476659
    Abstract: The present disclosure relates to methods for performing wafer-level measurement and wafer-level binning of LED devices. The present disclosure also relates to methods for reducing thermal resistance of LED devices. The methods include growing epitaxial layers consisting of an n-doped layer, an active layer, and a p-doped layer on a wafer of a growth substrate. The method further includes forming p-contact and n-contact to the p-doped layer and the n-doped layer, respectively. The method further includes performing a wafer-level measurement of the LED by supplying power to the LED through the n-contact and the p-contact. The method further includes dicing the wafer to generate diced LED dies, bonding the diced LED dies to a chip substrate, and removing the growth substrate from the diced LED dies.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: July 2, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Hsing-Kuo Hsia, Hung-Weng Huang, Ching-Hua Chiu, Gordon Kuo
  • Patent number: 8415684
    Abstract: An apparatus includes a wafer with a number of openings therein. For each opening, an LED device is coupled to a conductive carrier and the wafer in a manner so that each of the coupled LED device and a portion of the conductive carrier at least partially fill the opening. A method of fabricating an LED device includes forming a number of openings in a wafer. The method also includes coupling light-emitting diode (LED) devices to conductive carriers. The LED devices with conductive carriers at least partially fill each of the openings.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: April 9, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Gordon Kuo, Chyi Shyuan Chern
  • Publication number: 20120088322
    Abstract: Provided is a method of fabricating a light-emitting diode (LED) device. The method includes providing a substrate having opposite first and second sides. A semiconductor layer is formed on the first side of the substrate. The method includes forming a photoresist layer over the semiconductor layer. The method includes patterning the photoresist layer into a plurality of photoresist components. The photoresist components are separated by openings. The method includes filling the openings with a plurality of thermally conductive components. The method includes separating the semiconductor layer into a plurality of dies using a radiation process that is performed to the substrate from the second side. Each of the first regions of the substrate is aligned with one of the conductive components.
    Type: Application
    Filed: October 8, 2010
    Publication date: April 12, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Gordon Kuo
  • Publication number: 20120012871
    Abstract: The present disclosure relates to methods for performing wafer-level measurement and wafer-level binning of LED devices. The present disclosure also relates to methods for reducing thermal resistance of LED devices. The methods include growing epitaxial layers consisting of an n-doped layer, an active layer, and a p-doped layer on a wafer of a growth substrate. The method further includes forming p-contact and n-contact to the p-doped layer and the n-doped layer, respectively. The method further includes performing a wafer-level measurement of the LED by supplying power to the LED through the n-contact and the p-contact. The method further includes dicing the wafer to generate diced LED dies, bonding the diced LED dies to a chip substrate, and removing the growth substrate from the diced LED dies.
    Type: Application
    Filed: July 15, 2010
    Publication date: January 19, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsing-Kuo Hsia, Hung-Wen Huang, Ching-Hua Chiu, Gordon Kuo