Patents by Inventor Gordon Meyer

Gordon Meyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060161638
    Abstract: The present invention is a system and method that monitors upgrade availability for computer information on a user's computer and allows the user to determine which of the available upgrades will be downloaded to the user's computer and installed. The upgrade availability for computer information on the user's computer is monitored in the background, without user-intervention when the user connects to a network, such as the Internet. If any such upgrades are available, a flag is set to notify the user of such upgrades. The user is notified of any available upgrades when computer information is accessed for which an upgrade is available, and given a choice of whether or not to download the available upgrade(s). The downloaded upgrade(s) may then be installed by an installation means. In this manner, the present invention allows for the user to download only those upgrades desired by the user.
    Type: Application
    Filed: March 21, 2006
    Publication date: July 20, 2006
    Inventors: Gordon Meyer, Albert Howard, Wayne Loofbourrow
  • Patent number: 5710517
    Abstract: Asynchronously-generated digital and analog clocks in a mixed-signal test system are accurately aligned for repeatable and deterministic testing. A variable-frequency digital master clock signal is used in direct digital synthesis of an analog clock signal which is asynchronous to the master clock signal. A resync command inhibits the analog clock signal until the analog clock signal is in a desired phase relationship to the master clock signal. The analog clock signal is thus phase-aligned with the master clock signal in a known and deterministic relationship. The resync command also aligns the phase of the analog clock signal with the pattern of stimulus signals applied to the device under test. Aligning the analog clock signal with the master clock signal and with the stimulus pattern assures that test results are consistent from test-to-test. A phase-locked loop removes spurs from the synthesized analog clock signal.
    Type: Grant
    Filed: August 1, 1995
    Date of Patent: January 20, 1998
    Assignee: Schlumberger Technologies, Inc.
    Inventor: Dennis Gordon Meyer