Patents by Inventor Gordon Munns

Gordon Munns has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTERCONNECTION OF CONDUCTOR TO FEEDTHROUGH
    Publication number: 20130035733
    Abstract: A method of interconnecting a conductor and a hermetic feedthrough of an implantable medical device includes welding a lead to a pad on a feedthrough. The feedthrough includes a ceramic insulator and a via hermetically bonded to the insulator. The via includes platinum. The pad is bonded to the insulator and electrically connected to the via, includes platinum, and has a thickness of at least 50 ?m.
    Type: Application
    Filed: August 2, 2011
    Publication date: February 7, 2013
    Inventors: Mark Breyen, Tom Miltich, Gordon Munns
  • FEEDTHROUGH CONFIGURED FOR INTERCONNECT
    Publication number: 20130032391
    Abstract: A hermetic feedthrough for an implantable medical device includes an insulator, a conduit integrated with the insulator, and a pad coupled to an exterior surface of the insulator. The insulator includes a first material and the conduit includes a second material that is electrically conductive. The pad is configured to receive a lead coupled thereto. Further, the pad is electrically conductive and coupled to the conduit. The pad includes a first layer and a second layer overlaying at least a portion of the first layer.
    Type: Application
    Filed: August 2, 2011
    Publication date: February 7, 2013
    Inventors: Kengo Morioka, Arne Knudsen, Shingo Satou, Hidekazu Otomaru, Hiroshi Makino, Andrew Thom, Markus Reiterer, Gordon Munns, Thomas Miltich, Joyce Yamamoto
  • Super lattice modification of overlying transistor
    Patent number: 7456442
    Abstract: The invention provides a device having a substrate, a buffer region positioned upon the substrate, wherein the buffer region has an upper buffer region and a lower buffer region, a heterojunction region positioned upon the buffer region, and a superlattice positioned between the lower buffer region and the upper buffer region, wherein the device is configured to function as a heterojunction field effect transistor.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: November 25, 2008
    Assignee: International Rectifier Corporation
    Inventor: Gordon Munns
  • Super lattice modification of overlying transistor
    Publication number: 20060237745
    Abstract: The invention provides a device having a substrate, a buffer region positioned upon the substrate, wherein the buffer region has an upper buffer region and a lower buffer region, a heterojunction region positioned upon the buffer region, and a superlattice positioned between the lower buffer region and the upper buffer region, wherein the device is configured to function as a heterojunction field effect transistor.
    Type: Application
    Filed: June 8, 2006
    Publication date: October 26, 2006
    Inventor: Gordon Munns
  • Super lattice modification of overlying transistor
    Patent number: 7112830
    Abstract: The invention provides a device having a substrate, a buffer region positioned upon the substrate, wherein the buffer region has an upper buffer region and a lower buffer region, a heterojunction region positioned upon the buffer region, and a superlattice positioned between the lower buffer region and the upper buffer region, wherein the device is configured to function as a heterojunction field effect transistor.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: September 26, 2006
    Assignee: APA Enterprises, Inc.
    Inventor: Gordon Munns
  • Super lattice modification of overlying transistor
    Publication number: 20040195562
    Abstract: The invention provides a device having a substrate, a buffer region positioned upon the substrate, wherein the buffer region has an upper buffer region and a lower buffer region, a heterojunction region positioned upon the buffer region, and a superlattice positioned between the lower buffer region and the upper buffer region, wherein the device is configured to function as a heterojunction field effect transistor.
    Type: Application
    Filed: November 25, 2003
    Publication date: October 7, 2004
    Applicant: APA Optics, Inc.
    Inventor: Gordon Munns