Patents by Inventor Gordon Richard McLeod
Gordon Richard McLeod has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11617034Abstract: An integrated circuit for digital signal routing. Signal routing is achieved with a multiply-accumulate block, which takes data from one or more data sources and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period. The multiply-accumulate block operates on a time division multiplexed basis, so that multiple signal paths can be processed within one period of the sample clock.Type: GrantFiled: March 1, 2021Date of Patent: March 28, 2023Assignee: Cirrus Logic, Inc.Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Patent number: 11438694Abstract: An integrated circuit for digital signal routing. Signal routing is achieved with a multiply-accumulate block, which takes data from one or more data sources and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period. The multiply-accumulate block operates on a time division multiplexed basis, so that multiple signal paths can be processed within one period of the sample clock.Type: GrantFiled: March 1, 2021Date of Patent: September 6, 2022Assignee: Cirrus Logic, Inc.Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Publication number: 20210185440Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.Type: ApplicationFiled: March 1, 2021Publication date: June 17, 2021Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Publication number: 20210185441Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.Type: ApplicationFiled: March 1, 2021Publication date: June 17, 2021Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Patent number: 11024318Abstract: A method of speaker verification comprises: comparing a test input against a model of a user's speech obtained during a process of enrolling the user; obtaining a first score from comparing the test input against the model of the user's speech; comparing the test input against a first plurality of models of speech obtained from a first plurality of other speakers respectively; obtaining a plurality of cohort scores from comparing the test input against the plurality of models of speech obtained from a plurality of other speakers; obtaining statistics describing the plurality of cohort scores; modifying said statistics to obtain adjusted statistics; normalising the first score using the adjusted statistics to obtain a normalised score; and using the normalised score for speaker verification.Type: GrantFiled: November 15, 2019Date of Patent: June 1, 2021Assignee: Cirrus Logic, Inc.Inventors: John Paul Lesso, Gordon Richard McLeod
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Patent number: 10972836Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.Type: GrantFiled: May 28, 2020Date of Patent: April 6, 2021Assignee: Cirrus Logic, Inc.Inventors: Graeme G. Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Patent number: 10818298Abstract: A method of audio processing comprises receiving an audio signal. A plurality of framed versions of the received audio signal are formed, each of the framed versions having a respective frame start position. One of the plurality of framed versions of the received audio signal is selected. The selected one of the plurality of framed versions of the received audio signal is used in a subsequent process.Type: GrantFiled: November 13, 2018Date of Patent: October 27, 2020Assignee: Cirrus Logic, Inc.Inventors: John Paul Lesso, Gordon Richard McLeod
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Publication number: 20200296509Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.Type: ApplicationFiled: May 28, 2020Publication date: September 17, 2020Inventors: Graeme G. Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Patent number: 10728654Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.Type: GrantFiled: November 8, 2018Date of Patent: July 28, 2020Assignee: Cirrus Logic, Inc.Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Patent number: 10720171Abstract: In a method of audio processing, a plurality of audio samples are received, and are concatenated to form a composite audio signal. The composite audio signal is analysed to identify audio artefacts associated with concatenation in the composite audio signal, and any identified audio artefacts are compensated for, to form a corrected composite audio signal. The corrected composite audio signal is provided to a voice biometrics module.Type: GrantFiled: February 20, 2019Date of Patent: July 21, 2020Assignee: Cirrus Logic, Inc.Inventors: John Paul Lesso, Gordon Richard McLeod
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Publication number: 20200082831Abstract: A method of speaker verification comprises: comparing a test input against a model of a user's speech obtained during a process of enrolling the user; obtaining a first score from comparing the test input against the model of the user's speech; comparing the test input against a first plurality of models of speech obtained from a first plurality of other speakers respectively; obtaining a plurality of cohort scores from comparing the test input against the plurality of models of speech obtained from a plurality of other speakers; obtaining statistics describing the plurality of cohort scores; modifying said statistics to obtain adjusted statistics; normalising the first score using the adjusted statistics to obtain a normalised score; and using the normalised score for speaker verificationType: ApplicationFiled: November 15, 2019Publication date: March 12, 2020Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: John Paul LESSO, Gordon Richard MCLEOD
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Patent number: 10540978Abstract: A method of speaker verification comprises: comparing a test input against a model of a user's speech obtained during a process of enrolling the user; obtaining a first score from comparing the test input against the model of the user's speech; comparing the test input against a first plurality of models of speech obtained from a first plurality of other speakers respectively; obtaining a plurality of cohort scores from comparing the test input against the plurality of models of speech obtained from a plurality of other speakers; obtaining statistics describing the plurality of cohort scores; modifying said statistics to obtain adjusted statistics; normalising the first score using the adjusted statistics to obtain a normalised score; and using the normalised score for speaker verification.Type: GrantFiled: May 30, 2018Date of Patent: January 21, 2020Assignee: Cirrus Logic, Inc.Inventors: John Paul Lesso, Gordon Richard McLeod
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Publication number: 20190371340Abstract: A method of speaker verification comprises: comparing a test input against a model of a user's speech obtained during a process of enrolling the user; obtaining a first score from comparing the test input against the model of the user's speech; comparing the test input against a first plurality of models of speech obtained from a first plurality of other speakers respectively; obtaining a plurality of cohort scores from comparing the test input against the plurality of models of speech obtained from a plurality of other speakers; obtaining statistics describing the plurality of cohort scores; modifying said statistics to obtain adjusted statistics; normalising the first score using the adjusted statistics to obtain a normalised score; and using the normalised score for speaker verificationType: ApplicationFiled: May 30, 2018Publication date: December 5, 2019Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: John Paul LESSO, Gordon Richard MCLEOD
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Publication number: 20190147887Abstract: A method of audio processing comprises receiving an audio signal. A plurality of framed versions of the received audio signal are formed, each of the framed versions having a respective frame start position. One of the plurality of framed versions of the received audio signal is selected. The selected one of the plurality of framed versions of the received audio signal is used in a subsequent process.Type: ApplicationFiled: November 13, 2018Publication date: May 16, 2019Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: John Paul LESSO, Gordon Richard MCLEOD
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Publication number: 20190075394Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.Type: ApplicationFiled: November 8, 2018Publication date: March 7, 2019Inventors: Graeme G. Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Patent number: 10212513Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.Type: GrantFiled: August 25, 2017Date of Patent: February 19, 2019Assignee: Cirrus Logic, Inc.Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Publication number: 20180041833Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.Type: ApplicationFiled: August 25, 2017Publication date: February 8, 2018Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Patent number: 9774951Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.Type: GrantFiled: August 14, 2015Date of Patent: September 26, 2017Assignee: Cirrus Logic, Inc.Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod
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Patent number: 9378176Abstract: The present invention relates to methods and apparatus for data transfer. A data interface is described with at least a first data terminal for either outputting or receiving a data signal. In bi-directional embodiments there may be one terminal for receiving data and one terminal for outputting data. A bit clock terminal outputs or receives a bit clock signal; and a frame clock terminal for outputs or receives a frame clock signal. Interface control circuitry is configurable to associate data outputted or received in each frame with time slots (1-8) of a predetermined number of bits (x, y, z) wherein the control circuitry is adapted such that the frequency of the bit clock signal can be changed at any time so as to vary the number of time slots in a frame.Type: GrantFiled: December 17, 2010Date of Patent: June 28, 2016Assignee: Cirrus Logic International Semiconductor Ltd.Inventors: Robert James Hatfield, Gordon Richard McLeod, John Laurence Pennock
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Publication number: 20160044412Abstract: An integrated circuit for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period.Type: ApplicationFiled: August 14, 2015Publication date: February 11, 2016Inventors: Graeme Gordon Mackay, Jonathan Timothy Wigner, Gordon Richard McLeod