Abstract: A configurable semi-conductor integrated circuit has an area thereof formed with a plurality of logic circuits at discrete sites or cells respectively defining a matrix array of cells. The matrix array of cells is subdivided at least into zones, each having a matrix array of cells, and further includes a porting arrangement for each zone; and a hierarchical routing resource structure including: (i) global connection paths having selectable connections with the porting arrangement of each zone and which extend continuously across more than one zone, (ii) medium connection paths extending from the porting arrangement and selectably connectable with at least some of the cells in a zone, and (iii) local direct connection paths having for each cell a restricted signal translation system between inputs and outputs of the cells and defining first and second sets of logic circuits.