Patents by Inventor Gordon W. Kuwanoe

Gordon W. Kuwanoe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5699545
    Abstract: A system and method for generating row addresses for a memory structure on a column by column basis. In accordance with the novel method, a column read start address (SC) is subtracted from a column address (COL) to provide a column offset. Next, the column offset is multiplied by the multiplicative inverse of the skip period in modulo (SPM.sup.-1) to provide a first product. The first product is multiplied by a skip period between data strings to provide a second product. The second product is divided by a number (NC) which represents the number of columns in the memory structure to provide a first quotient. Finally, a base row address of a first row to be read (BRA) is added to the first quotient to provide a row address (RA). In a specific embodiment, the step of multiplying the column offset by the multiplicative inverse of the skip period in modulo includes the step of converting the first product to a modulo product.
    Type: Grant
    Filed: February 5, 1996
    Date of Patent: December 16, 1997
    Assignee: Hughes Electronics
    Inventors: Gordon W. Kuwanoe, Gary A. Wong