Abstract: A binning-based transmit beamforming for wireless communication systems includes determining a time correlation and a frequency correlation of a beamforming vector estimated from a previous transmission on a current hopping channel and one or more neighboring channels using one or more binning architectures that exploit channel correlation in both frequency and time dimensions. These binning architectures include global binning, local binning, and adaptive version of global and local binning. The subject system determines one or more beamforming weights for the current hoping channel according to the binning architecture, and provides, for transmission, a signal using transmit beamforming based on the one or more beamforming weights.

Abstract: A binning-based transmit beamforming for wireless communication systems includes determining a time correlation and a frequency correlation of a beamforming vector estimated from a previous transmission on a current hopping channel and one or more neighboring channels using one or more binning architectures that exploit channel correlation in both frequency and time dimensions. These binning architectures include global binning, local binning, and adaptive version of global and local binning. The subject system determines one or more beamforming weights for the current hoping channel according to the binning architecture, and provides, for transmission, a signal using transmit beamforming based on the one or more beamforming weights.

Abstract: A partitioned delta-sigma modulator for high-speed applications includes a plurality of modulation stages arranged in parallel to input and output terminals of the modulator and interconnected to one another in series. In some aspects, each of the plurality of modulation stages is configured to combine a first error signal from a prior modulation stage of the plurality of modulation stages with a first digital signal to produce an adder signal. In some aspects, the first error signal includes a delay from the prior modulation stage. Each of the plurality of modulation stages is also configured to convert the adder signal having a first bit width into a quantized signal having a second bit width smaller than the first bit width. Each of the modulation stages is also configured to provide a second error signal based on the quantized signal to a subsequent modulation stage of the plurality of modulation stages.

Abstract: A high-speed digital transmitter for wireless communication systems includes a plurality of transmitter chain circuits configured to respectively receive incoming component signals having a first frequency and to produce outgoing transmission signals having a second frequency greater than the first frequency in a first domain. In some aspects, the incoming component signals are up-sampled to the second frequency using a plurality of streams processed concurrently at a predetermined sample rate over a predetermined number of interpolation filter stages in each of the plurality of transmitter chain circuits. The high-speed digital transmitter also includes a serializer configured to combine the outgoing transmission signals from the plurality of transmitter chain circuits into a serialized transmission signal having a third frequency greater than the second frequency in a second domain different from the first domain.