Patents by Inventor Grégoire Chenebaux

Grégoire Chenebaux has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9923571
    Abstract: Ramp analog-digital converters used in matrix image sensors to provide a digital value representative of a level of illumination of a pixel are provided. Two voltage samples are applied to a comparator, a counter is used to count pulses at a frequency F from a starting instant of the ramp until a toggling of the comparator. Two other voltage samples, one of which is added to a linear voltage ramp having an identical starting instant and slope to the first ramp, are applied to a second comparator, a half counting frequency F/2 is applied to the counter from the toggling of one of the comparators, and the content of the counter at the moment of toggling of the other comparator is stored. Two measurements of samples of the same signal or of two different signals are averaged without undergoing a digital conversion for each signal and a digital addition.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: March 20, 2018
    Assignee: Pyxalis
    Inventors: Laurent Saint Martin, Grégoire Chenebaux
  • Patent number: 9781364
    Abstract: An active pixel image sensor comprising a matrix of pixels organized in rows and columns and a read circuit comprising a distinct read pathway for each column of pixels, comprises: a photodiode, a storage node, a transfer transistor, a storage node reset transistor, a row select transistor and a transistor mounted as voltage follower; each read pathway comprises a subtraction block connected to receive, first, voltage at the terminals of the storage node of a pixel of the corresponding column and, second, a reference voltage of value substantially equal to the reset voltage of the pixels of the matrix seen at the input of the read pathway; the sensor comprises a controller for driving the transistors of pixels and the read circuit to perform an image acquisition in global shutter mode with subtraction of the reset noise and non-destructive reading of the pixels. A method for acquiring images is provided.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: October 3, 2017
    Assignee: PYXALIS
    Inventor: Grégoire Chenebaux
  • Publication number: 20170077943
    Abstract: Ramp analog-digital converters used in matrix image sensors to provide a digital value representative of a level of illumination of a pixel are provided. Two voltage samples are applied to a comparator, a counter is used to count pulses at a frequency F from a starting instant of the ramp until a toggling of the comparator. Two other voltage samples, one of which is added to a linear voltage ramp having an identical starting instant and slope to the first ramp, are applied to a second comparator, a half counting frequency F/2 is applied to the counter from the toggling of one of the comparators, and the content of the counter at the moment of toggling of the other comparator is stored. Two measurements of samples of the same signal or of two different signals are averaged without undergoing a digital conversion for each signal and a digital addition.
    Type: Application
    Filed: May 4, 2015
    Publication date: March 16, 2017
    Inventors: Laurent SAINT MARTIN, Grégoire CHENEBAUX
  • Publication number: 20170026595
    Abstract: An active pixel image sensor comprising a matrix of pixels organized in rows and columns and a read circuit comprising a distinct read pathway for each column of pixels, comprises: a photodiode, a storage node, a transfer transistor, a storage node reset transistor, a row select transistor and a transistor mounted as voltage follower; each read pathway comprises a subtraction block connected to receive, first, voltage at the terminals of the storage node of a pixel of the corresponding column and, second, a reference voltage of value substantially equal to the reset voltage of the pixels of the matrix seen at the input of the read pathway; the sensor comprises a controller for driving the transistors of pixels and the read circuit to perform an image acquisition in global shutter mode with subtraction of the reset noise and non-destructive reading of the pixels. A method for acquiring images is provided.
    Type: Application
    Filed: July 21, 2016
    Publication date: January 26, 2017
    Inventor: Grégoire CHENEBAUX
  • Publication number: 20170006242
    Abstract: Matrix image sensors with active pixels comprise a photodiode and transistors in each pixel, with at least one transistor for commanding the reset of a charge storage zone (photodiode or floating diffusion). To avoid reset potential value errors in large matrices, when a global reset is desired for all the matrix, the falling edge of the reset command signal is shifted in time before progressively staggered signals are applied to the reset command lines. Duly staggered individual reset command signals are applied to groups of X rows (X>=1). The command signals mutually overlap to minimize the time necessary for the global reset of all the matrix. Delay elements or shift registers are used to produce individual signals with staggered falling edges.
    Type: Application
    Filed: December 22, 2014
    Publication date: January 5, 2017
    Inventor: Grégoire CHENEBAUX
  • Patent number: 9438218
    Abstract: Integrated circuits of large size produced by photorepetition of several mutually identical partial patterns are provided, more precisely to the compensation of propagation delays of signals (notably of clock signals) from one partial circuit to the following whereas the signals concerned must reach the various partial circuits simultaneously for proper operation of the whole. The compensation circuit provided in each partial circuit comprises a main transmission line for a master clock signal and a compensation line with multiple outputs, as well as a multiplexer for selecting one of the outputs, the output selected being different in the various partial circuits. The multiplexer provides a local clock signal in each partial circuit and these clock signals are synchronous despite the propagation delays.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: September 6, 2016
    Assignee: PYXALIS
    Inventor: Grégoire Chenebaux
  • Publication number: 20160036427
    Abstract: Integrated circuits of large size produced by photorepetition of several mutually identical partial patterns are provided, more precisely to the compensation of propagation delays of signals (notably of clock signals) from one partial circuit to the following whereas the signals concerned must reach the various partial circuits simultaneously for proper operation of the whole. The compensation circuit provided in each partial circuit comprises a main transmission line for a master clock signal and a compensation line with multiple outputs, as well as a multiplexer for selecting one of the outputs, the output selected being different in the various partial circuits. The multiplexer provides a local clock signal in each partial circuit and these clock signals are synchronous despite the propagation delays.
    Type: Application
    Filed: July 31, 2015
    Publication date: February 4, 2016
    Inventor: Grégoire CHENEBAUX
  • Patent number: 7916200
    Abstract: The invention relates to image sensors using a chip with cut corners. The sensor comprises a chip with cut corners comprising a matrix (10) of horizontal lines and vertical columns of photosensitive members, the matrix having a generally rectangular shape of horizontal width W and having four bevels, the sensor comprising as many current or voltage read blocks as there are matrix columns, in order to read the image signals detected by the photosensitive members, characterized in that the current or voltage read blocks are placed in a row (30, 30?) along a horizontal edge of the matrix of width W? and are all housed within a vertical strip, the width W1 of which is substantially less than the maximum width W of the matrix. There are two superposed rows of current read blocks with blocks distributed at the same pitch as the pixel columns, or there is a single row with read blocks distributed with a pitch less than that of the pixel columns.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: March 29, 2011
    Assignee: E2V Semiconductors
    Inventors: Thierry Ligozat, Grégoire Chenebaux
  • Publication number: 20100141820
    Abstract: The invention relates to matrix image sensors. It applies most particularly to intraoral dental radiology sensors. The invention provides a sensor architecture comprising a column decoder controlling select conductors of a column, and a row decoder controlling select conductors of a row. The pixels of a column are connected to a signal conductor that extends along the column and goes toward an analog multiplexer extending within the pixel matrix between two rows of pixels of the matrix. The multiplexer is controlled via the column select conductors coming from the decoder and it transmits the signal from a signal conductor of a selected column to an output conductor extending parallel to the rows. A signal sampling circuit common to all the columns is connected at the end of the output conductor of the multiplexer. An increase in matrix area is achieved by in practice losing only a single image row.
    Type: Application
    Filed: April 29, 2009
    Publication date: June 10, 2010
    Applicant: E2V Semiconductors
    Inventors: Gregoire Chenebaux, Thierry Ligozat
  • Publication number: 20090033777
    Abstract: The invention relates to image sensors using a chip with cut corners. The sensor comprises a chip with cut corners comprising a matrix (10) of horizontal lines and vertical columns of photosensitive members, the matrix having a generally rectangular shape of horizontal width W and having four bevels, the sensor comprising as many current or voltage read blocks as there are matrix columns, in order to read the image signals detected by the photosensitive members, characterized in that the current or voltage read blocks are placed in a row (30, 30?) along a horizontal edge of the matrix of width W? and are all housed within a vertical strip, the width W1 of which is substantially less than the maximum width W of the matrix. There are two superposed rows of current read blocks with blocks distributed at the same pitch as the pixel columns, or there is a single row with read blocks distributed with a pitch less than that of the pixel columns.
    Type: Application
    Filed: June 15, 2006
    Publication date: February 5, 2009
    Applicant: E2V
    Inventors: Thierry Ligozat, Gregoire Chenebaux